L64733 LSI Logic Corporation, L64733 Datasheet - Page 21
L64733
Manufacturer Part Number
L64733
Description
Tuner/receiver Chipset
Manufacturer
LSI Logic Corporation
Datasheet
1.L64733.pdf
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Tuner Control Interface
Typical Operating Circuit
The Tuner Control interface contains signals that control the L64733
Tuner IC.
FLCLK
INSEL
Figure 7
including external components. Not all external components are shown.
See the L64733/34 Evaluation Board User’s Guide for complete
schematic details.
L64733/L64734 Tuner and Satellite Receiver Chipset
is a diagram of a typical operating circuit for the chipset,
Filter Control Clock
FLCLK is the output of a programmable integer value
divider clocked by the demodulator sampling clock,
PCLK. The division ratio can be programmed with
register bits. The frequency of FLCLK multiplied by 16 is
the 3 dB cutoff of the programmable low-pass filters on
the L64733.
RF Input Select
When INSEL is asserted, the L64733 tuner selects the
normal mode. When INSEL is deasserted, the L64733
selects the Loop-Through mode.
Output
Output
21
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