L64733C LSI Logic Corporation, L64733C Datasheet - Page 13

• Manufacturer Part Number: L64733C
• Description: Tuner And Satellite Receiver Chipset Data Sheet 2/01
• Manufacturer: LSI Logic Corporation

Charge Pump Signals
L64734 Signal Descriptions
LODIV
MODp, MODn Prescaler Modulus
PLLINp, PLLINn
QDCp, QDCn Q-Channel DC Offset Correction
The following signals are outputs from the L64733C charge pump.
CP
FB
This section describes the L64734 signals. Figure 6 shows the interface
diagram of the L64734.
L64733C/L64734 Tuner and Satellite Receiver Chipset
LOBUF is deasserted, the internal PLL mode is in effect,
and the PSOUT pins are driven from the 32/33 prescaler.
Local Oscillator Buffer Division Ratio
When the LODIV signal is asserted, the local oscillator
(LO) buffer division ratio is set to 1; when it is deasserted,
the ratio is set to 2.
The MOD differential signals form a Positive Emitter
Coupled Logic (PECL) input that sets the prescaler
modulus. When the MODp signal is positive with respect
to the MODn signal, the prescaler modulus is set to 32
(divide by 32). When the MODn signal is positive with
respect to the MODp signal, the prescaler modulus is set
to 33 (divide by 33).
Phase Detector
The PLLIN differential signals form the phase detector
input and are connected to the L64734 PLLINp and
PLLINn output signals. See the L64734 PLLINp and
PLLINn descriptions in the “Synthesizer Control Interface”
section.
Connect a 0.1 F or larger capacitor between the QDCp
and QDCn signals.
Charge Pump
Connect the CP signal as shown in Figure 7, on page 23.
Feedback
Charge Pump Transistor Drive
Connect the FB signal as shown in Figure 7, on page 23.
Output
Output
Input
Input
Input
Input
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