L64733C LSI Logic Corporation, L64733C Datasheet - Page 39

• Manufacturer Part Number: L64733C
• Description: Tuner And Satellite Receiver Chipset Data Sheet 2/01
• Manufacturer: LSI Logic Corporation

Figure 9
Output
Synchronous timing is shown in Figure 10. Synchronous inputs must
have a setup and hold relationship with respect to the clock signal that
samples them. Synchronous outputs have a delay from the clock edge
that asserts them.
Figure 10
OUTPUTS
The reset pulse requirements are shown in Figure 11.
Figure 11
RESET
Figure 12 shows the relationship of the L64734 3-state signals to the
COEn signal.
L64733C/L64734 Tuner and Satellite Receiver Chipset
55 pF
INPUTS
PCLK
CLK
Point
Test
AC Test Load and Waveforms for 3-State Outputs
L64734 Synchronous AC Timing
L64734 RESET Timing Diagram
Iref = 20 mA
Iref = 20 mA
2
5
6
1
Vref = 1.5 V
7
3
4
Vref
2.5 V
0.5 V
8
V
0.5 V
DD
0.5 V
39