L64733C LSI Logic Corporation, L64733C Datasheet - Page 22

• Manufacturer Part Number: L64733C
• Description: Tuner And Satellite Receiver Chipset Data Sheet 2/01
• Manufacturer: LSI Logic Corporation

Tuner Control Interface
Typical Operating Circuit
22
VREF_LVDS
The Tuner Control Interface contains signals that control the L64733C
Tuner IC.
FLCLK
INSEL
Figure 7 is a diagram of a typical operating circuit for the chipset,
implemented with the L64733C-48 (48-pin package), including external
components. Not all external components are shown. See the L64733/34
Evaluation Board User’s Guide for complete schematic details.
L64733C/L64734 Tuner and Satellite Receiver Chipset
buffers used to drive the differential signals MODp,
MODn, and PLLINp, PLLINn. Connect the other side of
the resistor to ground.
LVDS Buffers Reference Voltage
The VREF_LVDS input is a 1.2 V 10% voltage level that
controls the common mode voltage of the LVDSOUT
buffers used to drive the differential signals MODp,
MODn, and PLLINp, PLLINn.
Filter Control Clock
This is the output of a programmable integer value divider
clocked by PCLK (the demodulator sampling clock). The
division ratio can be programmed with register bits. The
FLCLK frequency multiplied by 16 is the 3 dB cutoff of the
programmable low pass filters on the L64733C.
RF Input Select
When INSEL is asserted, the L64733C tuner selects the
normal mode. When INSEL is deasserted, the L64733C
selects the Loop-Through mode.
Output
Output
Input