L64733C LSI Logic Corporation, L64733C Datasheet - Page 15

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L64733C

Manufacturer Part Number
L64733C
Description
Tuner And Satellite Receiver Chipset Data Sheet 2/01
Manufacturer
LSI Logic Corporation
Datasheet
Channel Interface
Channel Clock Interface
The following signal descriptions are listed according to the major
interface groups.
The Channel Interface is the input path to the L64734 satellite receiver.
The two signals IVIN and QVIN are the I and Q streams from the satellite
tuner circuit. The CLK signal strobes in the data signals.
IBYPASS[5:0] I Channel Data
IVINp, IVINn
QBYPASS[5:0]
QVINp, QVINn
The Channel Clock Interface consists of the clock and crystal oscillator
signals.
CLK
L64733C/L64734 Tuner and Satellite Receiver Chipset
The IBYPASS[5:0] signals form the digital received
I channel data input bus, which supplies the I Stream to
the L64734 when the ADC is bypassed. The setting of
particular register bits in the L64734 controls the bypass.
I Channel Data
The IVINp and IVINn differential signals form the analog
received I channel data input bus, which supplies the I
stream to the L64734.
Q Channel Data
The QBYPASS[5:0] signals form the digital received
Q channel data input bus, which supplies the Q Stream
to the L64734 when the ADC is bypassed. The setting of
particular register bits in the L64734 controls the bypass.
Q Channel Data
The QVINp and QVINn differential signals form the
analog received Q channel data input bus, which supplies
the Q stream to the L64734.
IVIN/QVIN Input Clock
CLK is a positive, edge-triggered clock that strobes input
data to the L64734.
Input
Input
Input
Input
Input
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