L64780 LSI Logic Corporation, L64780 Datasheet - Page 43
L64780
Manufacturer Part Number
L64780
Description
Dvb-t Cofdm Demodulator Technical Manual 2/00
Manufacturer
LSI Logic Corporation
Datasheet
1.L64780.pdf
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CLKOUT54
Figure 3.13 Hierarchical, One FEC Decoder Mode With 16 QAM (HP or LP Selected) or
CLKOUT54
Figure 3.14 Hierarchical, One FEC Decoder Mode With 64 QAM (HP Selected Only)
\
SD0[3:0]
SD0[3:0]
DVOUT
DVOUT
64 QAM (LP Selected only)
SD00 SD01 SD02
SD00 SD01
When a set of soft decisions is received from the Bit Deinterleaver block
in 16 QAM (HP or LP selected) or in 64 QAM (only HP selected), two
soft decisions are transmitted over SD0. The result is that DVOUT is
asserted for two of six 54 MHz clock cycles. See
When a set of soft decisions is received from the Bit Deinterleaver block,
and the DOF function is configured in 64 QAM with the LP data stream
selected, four consecutive soft decisions must be transmitted over SD0.
Thus, DVALIDOUT is asserted for four of six 54 MHz clock cycles.
See
Output Interface
Figure
3.14.
SD03
SD04 SD05
SD02
SD03
SD06
Figure
SD07
3.13.
3-7
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