L64780 LSI Logic Corporation, L64780 Datasheet - Page 79

• Manufacturer Part Number: L64780
• Description: Dvb-t Cofdm Demodulator Technical Manual 2/00
• Manufacturer: LSI Logic Corporation

4.4.7 Address Line 0x0D
4.4.8 Address Line 0x0E
TIM_OFFSET_LSB
TIM_STALL
TIM_POL
Parameter Registers
0x0D
0x0E
TIM_STALL
7
7
Start Pulse Phase Offset (LSB)
The start pulse is a signal with a periodicity of every
FFT-MODE+GUARD 9 MHz cycles (in steady state). The
TIM_OFFSET bits adjust the phase of this signal in the
periodic window. The initial condition for the
TIM_OFFSET_LSB bits is 0x00.
TIM Loop Updating Freeze
This bit determines if the Loop is working (this bit is 0) or
stalled (this bit is 1).
If the Loop is working, the integrator inside the L64780
updates its value.
If the Loop is stalled, the integrator inside the L64780
keeps its internal value constant, letting you set the
VCXO Frequency Offset by means of the TIM_CLK_INIT
bits.
The initial condition for the TIM_STALL bit is 0, normal
working mode.
TIM VCXO Polarity
This bit determines the polarity of the external VCXO:
The initial condition for the TIM_POL is 1, negative
polarity.
If the polarity is positive (this bit is 0), the output
frequency of the external VCXO increases with
increasing voltage from VCXOUT.
If the polarity is negative (this bit is 1), the output
frequency of the external VCXO decreases with
increasing voltage from VCXOUT.
TIM_POL
6
TIM_OFFSET_LSB
5
TIM_OFFSET_MSB
R/W [7:0]
R/W 7
R/W 6
0
4-27
0