L64780 LSI Logic Corporation, L64780 Datasheet - Page 74

• Manufacturer Part Number: L64780
• Description: Dvb-t Cofdm Demodulator Technical Manual 2/00
• Manufacturer: LSI Logic Corporation

4-22
ADCON
Register Descriptions
When in Normal mode, the L64780 receives a real signal
in the intermediate frequency (about 4.5 MHz), and the
R2C block performs the baseband conversion. In this
mode, the DDFS block receives a complex baseband
signal directly from the R2C block and takes the
DDFS_XIN, DDFS_YIN, and DDFS_DVIN signals and
the symbol synchronization DDFS_STARTIN signal from
the Timing synchronization (TIM) block.
In Down-Converter Off-Chip mode, the baseband
conversion is done by the tuner, but the COFDM symbol
synchronization signal is still provided by the TIM block.
In this mode, the DDFS block takes the DDFS_XOFF,
DDFS_YOFF, and DDFS_DVOFF signals from the off-
chip interface, whereas the symbol synchronization
DDFS_STARTIN signal comes from the TIM block (see
Section 3.2.1, “Access to Timing and DDFS Blocks,”
page
DDFS_DVOFF signals mapping into the MUXIN bus).
When in Test mode, the DDFS block receives the
baseband complex data and the symbol synchronization
from the off-chip interface. In this mode, the
DDFS_XOFF, DDFS_YOFF, DDFS_DVOFF, and
DDFS_STARTOFF signals come from the off-chip
interface. (See
DDFS Blocks,” page
DDFS_YOFF, and DDFS_DVOFF and DDFS_STARTOFF
signals mapping into the MUXIN bus.)
In Disable mode, only the DDFS_XIN, DDFS_YIN,
DDFS_DVIN, and DDFS_STARTIN signals are used; no
frequency shift is applied to the incoming complex data,
but the data processing time latency must be preserved.
ADC Selector
This bit determines if the L64780 uses the 8-bit on-chip
(1), or the external 10-bit (0) ADC. The initial condition for
the ADCON is 0, the external 10-bit ADC.
3-10, for the DDFS_XOFF, DDFS_YOFF, and
Section 3.2.1, “Access to Timing and
3-10, for the DDFS_XOFF,
R/W 0