XR16L788 Exar Corporation, XR16L788 Datasheet

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XR16L788

Manufacturer Part Number
XR16L788
Description
High-performance 3.3V Octal Uart
Manufacturer
Exar Corporation
Datasheet

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SEPTEMBER 2001
GENERAL DESCRIPTION
The XR16L788
and 3.3V with 5V tolerant inputs octal Universal Asyn-
chronous Receiver and Transmitter (UART). The
highly integrated device is designed for high band-
width requirement in communication systems. A new
feature increases device driver efficiency includes a
global interrupt pin with global interrupt source regis-
ters that provide complete and detailed interrupt sta-
tus information for all 8 channels that will speed up in-
terrupt parsing. Other new facilities include simulta-
neous UART registers initialization, individual UART
channel soft-reset, DTR/DSR hardware flow control,
software flow control (Xoff/Xon) detection indicators,
RS-485 half-duplex direction control with programma-
ble turn-around delay, Intel or Motorola bus interface
and sleep mode now has a wake-up indicator.
N
APPLICATIONS
• Remote Access Servers
• Ethernet Network to Serial Ports
• Network Management
• Factory Automation and Process Control
• Point-of-Sale Systems
• Multi-port RS-232/RS-422/RS-485 Cards
EXAR Corporation 48720 Kato Road, Fremont CA, 94538 • (510) 668-7000 • FAX (510) 668-7017 • www.exar.com • uarttechsupport@exar.com
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F
OTE
IGURE
R S T #
A 7:A 0
D 7 :D 0
IO R #
IO W #
C S #
IN T #
1 6/6 8#
:
Covered by US patents #5,649,122 and #5,949,787
1. B
LOCK
1
(788), formerly XR16L758, is a 5V
D
D a ta B u s
Inte rfa ce
IAGRAM
T im e r/C o un ter
C o n figu ra tio n
R e g isters
D e vice
1 6-bit
HIGH PERFORMANCE OCTAL UART
NEW FEATURES:
• 5V and 3.3 V with 5V Tolerant Inputs Operation
• Single Interrupt Output for all 8 UARTs
• Global Interrupt Source for all 8 UARTs
• 5G “Flat” UART Registers for Configurations
• Simultaneous UART Channels Initialization
• Auto RS485 Half-duplex Control with Program-
• A General Purpose 16-bit Timer/Counter
• Sleep Mode with Wake-up Indication
• Highly Integrated Device for Space Saving
• First eight registers are 16C550 compatible
• 64-byte Transmit and Receive FIFOs
• Transmit and Receive FIFO Level Counters
• Programmable TX and RX FIFO Trigger Levels
• Automatic RTS/CTS or DTR/DSR Flow Control
• Selectable Hardware Flow Control Hysteresis
• Automatic Xon/Xoff Software Flow Control with Sta-
• Infrared (IrDA 1.0) Data Encoder/Decoder
• Programmable Data Rate with Prescaler
• Up to 6.25 Mbps Serial Data Rate at 5V
• 100-pin QFP Package (14x20x3 mm)
mable Turn-around Delay
tus Indicator
U A R T
R eg s
B R G
U A R T C ha n ne l 1
U A R T C ha n ne l 2
U A R T C ha n ne l 3
U A R T C ha n ne l 4
U A R T C ha n ne l 5
U A R T C ha n ne l 0
U A R T C ha n ne l 6
U A R T C ha n ne l 7
C rystal O sc/B u ffer
T X & R X
64 B yte T X FIF O
64 B yte R X F IF O
E N D E C
IR
XR16L788
T X 0 , R X 0 , D T R 0# ,
D S R 0# , R T S 0# ,
C T S 0 # , C D 0 #, R I0 #
X T A L1
X T A L2
T M R C K
T X 7 , R X 7 , D T R 7# ,
D S R 7# , R T S 7# ,
C T S 7 # , C D 7 #, R I7 #
REV. 1.1.4

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