ATA5771 ATMEL Corporation, ATA5771 Datasheet - Page 198
ATA5771
Manufacturer Part Number
ATA5771
Description
Manufacturer
ATMEL Corporation
Datasheet
1.ATA5771.pdf
(284 pages)
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146
ATtiny24/44/84
done by first turning off the ADC, then changing multiplexer settings and then turn on the ADC.
Alternatively, the first conversion results after changing multiplexer settings should be discarded.
Table 16-4.
Notes:
See
well as selections of offset calibration channels. MUX0 bit works as a gain selection bit for differ-
ential channels shown in
when it is set (‘1’) 20x gain is selected. For normal differential channel pairs MUX5 bit work as a
polarity reversal bit. Toggling of the MUX5 bit exhanges the positive and negative channel other
way a round.
Table 16-5.
Single Ended Input
ADC0 (PA0)
ADC1 (PA1)
ADC2 (PA2)
ADC3 (PA3)
ADC4 (PA4)
ADC5 (PA5)
ADC6 (PA6)
ADC7 (PA7)
Reserved for differential channels
0V (AGND)
1.1V (I Ref)
ADC8
Reserved for offset calibration
Reserved for reversal differential channels
Positive Differential
Table 16-5 on page 146
ADC0 (PA0)
ADC1 (PA1)
ADC2 (PA2)
(2)
1. See
2.
3. For offset calibration only .See
Input
“Temperature Measurement” on page 144
Single-Ended Input channel Selections.
Differential Input channel Selections.
Table 16-5 on page 146
Negative Differential
Table
(3)
ADC0 (PA0)
for details of selections of differential input channel selections as
ADC1 (PA1)
ADC3 (PA3)
ADC0 (PA0)
ADC2 (PA2)
ADC3 (PA3)
ADC1 (PA1)
ADC3 (PA3)
(1)
16-5. When MUX0 bit is cleared (‘0’) 1x gain is selected and
Input
for details.
(1)
Table 16-5 on page 146
(1)
Gain 1x
001000
001010
101000
001100
001110
101100
010000
N/A
and
“ADC Operation” on page 133
MUX5..0
001000 - 011111
100011 - 100111
101000 - 111111
MUX5..0
000000
000001
000010
000011
000100
000101
000110
000111
100000
100001
100010
Gain 20x
100011
001001
001011
101001
001101
001111
101101
010001
8006G–AVR–01/08
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