ATA5771 ATMEL Corporation, ATA5771 Datasheet - Page 75
ATA5771
Manufacturer Part Number
ATA5771
Description
Manufacturer
ATMEL Corporation
Datasheet
1.ATA5771.pdf
(284 pages)
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6. System Clock and Clock Options
6.1
6.1.1
6.1.2
8006G–AVR–01/08
Clock Systems and their Distribution
CPU Clock – clk
I/O Clock – clk
I/O
Figure 6-1 on page 23
of the clocks need not be active at a given time. In order to reduce power consumption, the
clocks to modules not being used can be halted by using different sleep modes, as described in
“Power Management and Sleep Modes” on page
Figure 6-1.
The CPU clock is routed to parts of the system concerned with operation of the AVR core.
Examples of such modules are the General Purpose Register File, the Status Register and the
Data memory holding the Stack Pointer. Halting the CPU clock inhibits the core from performing
general operations and calculations.
The I/O clock is used by the majority of the I/O modules, like Timer/Counter. The I/O clock is
also used by the External Interrupt module, but note that some external interrupts are detected
by asynchronous logic, allowing such interrupts to be detected even if the I/O clock is halted.
CPU
ADC
External Clock
clk
clk
Clock Distribution
ADC
I/O
Source clock
presents the principal clock systems in the AVR and their distribution. All
General I/O
System Clock
Modules
Control Unit
AVR Clock
Multiplexer
Prescaler
Clock
Calibrated RC
Oscillator
Oscillator
Crystal
Reset Logic
CPU Core
clk
clk
CPU
FLASH
Crystal Oscillator
Low-Frequency
32. The clock systems are detailed below.
Watchdog Timer
Watchdog clock
RAM
Watchdog
Oscillator
ATtiny24/44/84
Flash and
EEPROM
Calibrated RC
Oscillator
23
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