AD1954 Analog Devices, AD1954 Datasheet - Page 13

• Manufacturer Part Number: AD1954
• Description: SigmaDSP Digital Audio Processor
• Manufacturer: Analog Devices

The sign-extension between the serial port and the DSP core
allows for up to 12 dB of gain in the signal path without internal
clipping. Gains greater than 12 dB can be accommodated by
scaling the input down in the first biquad filter, and scaling the
signal back up at the end of the biquad filter section.
A digital clipper circuit is used between the output of the DSP
core and the input to the DAC sigma-delta modulators, to pre-
vent overloading the DAC circuitry (see Figure 3). Note that
there is a gain factor of 0.75 used in the DAC interpolation
filters, and therefore signal values of up to 1/0.75 will pass through
the DSP without clipping. Since the DAC is designed to produce
an analog output of 2 V
input, signals between 0 dB and 1/0.75 (approximately 3 dB)
will produce larger analog outputs and result in slightly degraded
analog performance. This extra analog range is necessary in
order to pass 0 dBFS square waves through the system, as these
square waves cause overshoots in the interpolation filters that
would otherwise briefly clip the digital DAC circuitry.
A separate digital clipper circuit is used in the DSP core to
ensure that any accumulator values that exceed the numeric 3.23
format range are clipped when taken from the accumulator.
High-Pass Filter
The high-pass filter is a first-order double-precision design. The
purpose of the high-pass filter is to remove “Digital DC” from
the input. If this DC were allowed to pass, the detectors used in
the compressor/limiter would give an incorrect reading for low
signal levels.
The high-pass filter is controlled by a single parameter (alpha_HPF),
which is programmed by writing to SPI location 180 in 2.20
two’s complement format. The following equation can be used
to calculate the parameter Alpha_HPF from the –3 dB point of
the filter:
where EXP is the exponential operator, HPF_CUTOFF is the
high-pass cutoff in Hz, and f
The default value for the –3 dB cutoff of the high-pass filter is
2.75 Hz at a sampling rate of 44.1 kHz.
Alpha HPF
_
IN
DATA IN
=
1 0
Z
Z
–1
–1
. –
SERIAL PORT
EXP
rms
b0
(differential) with a 0 dB digital
b1
b2



S
2-BIT SIGN EXTENTION
– .
is the audio sampling rate.
PRELIMINARY TECHNICAL DATA
2 0
1.23
×
π
3.23
×
a1
a2
HPF CUTOFF
SIGNAL PROCESSING
f
S
(3.23 FORMAT)
_
Z
Z
–1
–1
OUT



(1)
0.75
FILTERS (3.23 FORMAT)
DAC INTERPOLATION
Biquad Filters
Each of the two input channels has seven second-order biquad
sections in the signal path. In addition, the left and right chan-
nels have two additional biquad filters that may be used either
as crossover filters or as additional equalization filters. The SUB
channel has three additional biquad filters, also to be used as
equalization and/or crossover filters. In a typical scenario, the
first seven biquads would be used for speaker equalization and/
or tone controls, and the remaining filters would be programmed
to function as crossover filters. Note that there is a common
equalization section used for both the main and SUB channels,
followed by crossover filters. This arrangement prevents any
interaction from occurring between the crossover filters and the
equalization filters. One section of the Biquad IIR filter is shown
in Figure 4.
This section implements the transfer function:
The coefficients a1, a2, b0, b1, and b2 are all in two’s comple-
ment 2.20 format with a range from –2 to +2 (minus 1 LSB).
The negative sign on the a1 and a2 coefficients is the result of
adding both the feed-forward ‘b’ terms as well as the feedback
‘a’ terms. Some digital filter packages automatically produce the
correct a1 and a2 coefficients for the topology of Figure 4, while
others assume a denominator of the form 1 + a1 × Z
In this case, it may be necessary to invert the a1 and a2 terms
for proper operation.
The biquad structure shown in Figure 4 is coded using double-
precision math to avoid limit-cycles from occurring when low-
frequency filters are used. The coefficients are programmed by
writing to the appropriate location in the Parameter RAM,
through the SPI port (see Table V). There are two possible
scenarios for controlling the biquad filters:
1. Dynamic Adjustment (for example, Bass/Treble control or Para-
2. Setting Static EQ Curve after Power-Up
metric Equalizer)
When using dynamic filter adjustment, it is highly recom-
mended that the user employ the “safeload” mechanism to
avoid temporary instability when the filters are dynamically
updated. This could occur if some, but not all, of the coeffi-
cients were updated to new values when the DSP calculates
the filter output. The operation of the Safeload registers is
detailed in the Options for Parameter Updates section.
If many of the biquad filters need to be initialized after power-
up (for example, to implement a static speaker-correction
curve), the recommended procedure is to set the processor
shutdown bit, wait for the volume to ramp down (about
20 ms), and then write directly to the Parameter RAM in
H Z
( )
=
(
(
b
1
0
−
+
CLIPPER
DIGITAL
a
b
1
1
×
×
Z
Z
–
–
1
1
–
+
DIGITAL SIGMA-DELTA
a
b
2
2
MODULATORS
(1.23 FORMAT)
×
×
Z
Z
–
–
2
2
)
)
AD1954
–1
+ a2 × Z
(2)
–1
.