AD1954 Analog Devices, AD1954 Datasheet - Page 29

• Manufacturer Part Number: AD1954
• Description: SigmaDSP Digital Audio Processor
• Manufacturer: Analog Devices

Setting the Data and MCLK Input Selectors
The AD1954 contains input selectors for both the serial data
inputs as well as the MCLK input. This allows the AD1954 to
select a variety of input and clock sources with no external hard-
ware required. These input selectors are controlled by writing to
SPI Control Register 2.
When the DATA source or MCLK source is changed by writing
to the SPI port, it is possible that a pop or click will occur in the
audio. To prevent this noise, the core should be shut down by
writing a 1 to the “halt program” bit in Control Register 1. This
initiates a volume ramp-down sequence followed by a shutdown
of the DSP core. Once the core is shut down (which can be
verified by reading bit 1 from Control Register 1, or by waiting
at least 20 ms after the halt program command is issued), the
new DATA or MCLK source can be programmed by writing to
Control Register 2. The DSP core can then be restarted by
clearing the “halt-program” bit in Control Register 1.
DATA CAPTURE REGISTERS
The AD1954 incorporates a feature called “data-capture.” Using
this feature, any node in the signal processing flow diagram may
be sent either to an SPI-readable register, or to a dedicated serial
output pin. This allows the basic functionality of the AD1954 to
be extended to a larger number of channels, or alternatively it
can be used to monitor and display information about signal
levels or compressor/limiter activity.
The AD1954 contains four independent data capture registers.
Two of these registers transfer their data to the data capture
serial output (DCSOUT) pin. The serial data format of this pin
is the same as the serial data format used for the main digital
inputs, and the LRCLK and BCLK signals can therefore be used
as frame sync and bit-clock signals. This pin is primarily intended
to feed signals to an external DAC or DSP chip to extend the
number of channels that the internal DSP can access. The other
two registers may be read back over the SPI port, and can be
used for a variety of purposes. One example might be to access
the dB output of the internal RMS detector, to run a front-
panel signal level display. A sample system is shown in Figure 18.
For each of the four data capture registers, a capture count and a
register select must be set. The capture count is a number between
0 and 511 that corresponds to the program step number where
the capture will occur. The register-select field programs one of
four registers in the DSP core that will be transferred to the
data-capture register when the program counter equals the capture
count. The register select field is decoded as follows:
00: Multiplier Output (Mult_Out)
01: Output of dB conversion block (DB_OUT)
10: Multiplier Data input (MDI)
11: Multiplier Coefficient Input (MCI)
PRELIMINARY TECHNICAL DATA
The capture count and register select bits are set by writing to
one of the four Data Capture registers at the following SPI
addresses:
261: SPI data capture setup register #1
262: SPI data capture setup register #2
263: Data Capture serial out setup register #1
264: Data Capture serial out setup register #2
The format of the captured data varies according to the register
select fields. Data captured from the Mult_Out setting is in 1.23
two's complement format, so that a full-scale input signal will
produce a full-scale digital output (assuming no processing). If
the parameters are set such that the input-to-output gain is
more than 0 dB, then the digital output will be clipped.
Data captured using the MDI setting is in 3.21 format. A 0 dB
digital input will produce a –12 dB digital output, assuming the
AD1954 is set for no processing.
Data captured using the MCI setting is in 2.20 format. This
data is generally a signal gain or filter coefficient, and therefore
it does not make sense to talk about the input-to-output gain. A
coefficient of 01000000000000000000 corresponds to a gain of 1.0.
The data that must be written to set up the data capture is a
concatenation of the 9-bit Program Count index with the 2-bit
register select field. Refer to Table XX to find the capture count
and register select numbers that corresponds to the desired
point to be monitored in the signal-processing flow.
The SPI capture registers can be accessed by reading from SPI
locations 261 (for SPI Capture Register 1) or 262 (for SPI
Capture Register 2). The other two data capture registers (data-
capture serial-out) automatically transfer their data to the Data
Capture Serial Out (DCSOUT) pin. DCSOUT Capture Regis-
ter 1 is present in the left data slot (as defined by the serial input
format) and SCOUT Capture Register 2 is present in the right
data slot. The format for writing to the SPI data-capture setup
registers is given in the SPI section of this datasheet.
dB LEVEL METERS
CONTROLLER
MICRO-
LRCLK
BCLK
AD1954
EXT DACs
DCSOUT
AD1954
CHANNEL
OUTPUT
5.1