AD1954 Analog Devices, AD1954 Datasheet - Page 32

• Manufacturer Part Number: AD1954
• Description: SigmaDSP Digital Audio Processor
• Manufacturer: Analog Devices

AD1954
For the DSP serial port mode, LRCLK must pulse HI for at
least one bit clock period before the MSB of the left channel is
valid, and LRCLK must pulse HI again for at least one bit clock
period before the MSB of the right channel is valid. Data is sampled
on the falling edge of BCLK. The DSP serial port mode can be
used with any wordlength up to 24 bits. In this mode, it is the
responsibility of the DSP to ensure that the left data is transmitted
with the first LRCLK pulse, and that synchronism is maintained
from that point forward.
DIGITAL CONTROL PINS
Mute
The AD1954 offers two methods of muting the analog output.
By asserting the MUTE signal HI, the left, right and SUB chan-
nel are muted. As an alternative, the user can assert the mute bit
in the serial Control Register HI. The AD1954 has been designed
to minimize pops and clicks when muting and unmuting the
device by automatically ramping the gain up or down. When the
device is unmuted, the volume returns to the value set in the
volume register.
De-emphasis
The AD1954 has a built-in de-emphasis filter that can be used to
decode CDs that have been encoded with the standard “redbook”
50 µs/15 µs emphasis response curve. This feature may be activated
by the pin or by an SPI write to the Control Register. When
activating with the pin, only the 44.1 kHz sample-rate curve is
available. When using the SPI port, curves for 44.1 kHz, 32 kHz,
and 48 kHz are supported.
ANALOG OUTPUT SECTION
Figure 20 shows the block diagram of the analog output section.
A series of current sources are controlled by a digital sigma-delta
modulator. Depending on the digital code from the modulator,
each current source is connected to the summing junction of
either a positive I-to-V converter or a negative I-to-V converter.
Two extra current sources that “push” instead of “pull” are
added to set the mid-scale common-mode voltage.
All current sources are derived from the VREF input pin. The
gain of the AD1954 is directly proportional to the magnitude of
the current sources, and therefore the gain of the AD1954 is
proportional to the voltage on the VREF pin. With VREF set to
2.25 V, the gain of the AD1954 is set to provide signal swings of
2 V
mended operating condition.
rms
differential (1 V
rms
from each pin). This is the recom-
PRELIMINARY TECHNICAL DATA
When the AD1954 is used to drive an audio power amplifier,
and the compression feature is being used, then the VREF volt-
age should be derived by dividing down the supply of amplifier.
This sets a fixed relationship between the digital signal level
(which is the only information available to the digital compres-
sor) and the full-scale output of the amplifier (just prior to the
onset of clipping). For example, if the amplifier power supply
drops by 10%, then the VREF input to the amplifier will also
drop by 10%, which will reduce the analog output signal swing
by 10%. The compressor will therefore be effective in prevent-
ing clipping regardless of any variation in amplifier supply voltage.
Since the VREF input effectively multiplies the signal, care must
be taken to ensure that no AC signals appear on this pin. This
can be accomplished by using a large decoupling capacitor in
the VREF external resistive divider circuit. If the VREF signal is
derived by dividing the 5 V analog supply, then the time constant
of the divider must effectively filter any noise on the supply. If
the VREF signal is derived from an unregulated power-amplifier
supply, then the time constant must be longer, as the ripple on
the amplifier supply voltage will presumably be greater than in
the case of the 5 V supply.
OUT+
FROM DIGITAL
SIGMA-DELTA
MODULATOR
(DIG_IN)
I
REF
+ DIG_IN
I
REF
SWITCHED CURRENT
SOURCES
BIAS
VREF
IN
I
REF
I
REF
– DIG_IN
OUT–