MT57W1MH18J Micron Semiconductor Products, Inc., MT57W1MH18J Datasheet - Page 23
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MT57W1MH18J
Manufacturer Part Number
MT57W1MH18J
Description
18Mb Ddrii SRAM, 1.8V Vdd, Hstl, 4-Word Burst,
Manufacturer
Micron Semiconductor Products, Inc.
Datasheet
1.MT57W1MH18J.pdf
(28 pages)
NOTE:
Table 15: TAP AC Electrical Characteristics
Notes 1, 2; 0°C £ T
NOTE:
18Mb: 1.8V V
MT57W1MH18J_H.fm – Rev. H, Pub. 3/03
1.
2. Test conditions are specified using the load in Figure 10.
DESCRIPTION
Clock
Clock cycle time
Clock frequency
Clock HIGH time
Clock LOW time
Output Times
TCK LOW to TDO unknown
TCK LOW to TDO valid
TDI valid to TCK HIGH
TCK HIGH to TDI invalid
Setup Times
TMS setup
Capture setup
Hold Times
TMS hold
Capture hold
Timing for SRAM inputs and outputs is congruent with TDI and TDO, respectively, as shown in Figure 9.
t
CS and
DD
, HSTL, DDRIIb4 SRAM
t
CH refer to the setup and hold time requirements of latching data from the boundary scan register.
A
£ +70°C; V
Test Mode Select
Test Data-Out
Test Data-In
Test Clock
DD
(TDO)
(TMS)
= 1.8V ±0.1V
(TCK)
(TDI)
1
Figure 9: TAP Timing
t MVTH
t DVTH
2
t THTL
t THMX
t THDX
23
t
TLTH
2 MEG
3
1.8V V
t THTH
Micron Technology, Inc., reserves the right to change products or specifications without notice.
DON’T CARE
X
4
8, 1 MEG
SYMBOL
DD
t
t
t
t
t
t
t
t TLOX
t
t
MVTH
THMX
DVTH
THDX
THTH
TLOX
TLOV
THTL
TLTH
t
f
t
CH
CS
t TLOV
TF
, HSTL, DDRIIb4 SRAM
5
UNDEFINED
MIN
100
40
40
10
10
10
10
10
10
0
X
6
18, 512K
MAX
10
20
©2003 Micron Technology, Inc.
X
UNITS
MHz
36
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns