PIC16C620 Microchip Technology, PIC16C620 Datasheet - Page 33

• Manufacturer Part Number: PIC16C620
• Description: EPROM-Based 8-Bit CMOS Microcontroller
• Manufacturer: Microchip Technology

6.2
When an external clock input is used for Timer0, it must
meet certain requirements. The external clock
requirement is due to internal phase clock (T
synchronization. Also, there is a delay in the actual
incrementing of Timer0 after synchronization.
6.2.1
and low for at least 2T
20 ns). Refer to the electrical specification of the
desired device.
FIGURE 6-5:
When no prescaler is used, the external clock input is
the same as the prescaler output. The synchronization
of
accomplished by sampling the prescaler output on the
Q2 and Q4 cycles of the internal phase clocks
(Figure 6-5). Therefore, it is necessary for T0CKI to be
high for at least 2T
1998 Microchip Technology Inc.
T0CKI
External Clock/Prescaler
Output after sampling
Note 1: Delay from clock input change to Timer0 increment is 3Tosc to 7Tosc. (Duration of Q = Tosc).
External Clock Input or
Prescaler output
Using Timer0 with External Clock
EXTERNAL CLOCK SYNCHRONIZATION
Increment Timer0 (Q4)
2: External clock if no prescaler selected, Prescaler output otherwise.
3: The arrows indicate the points in time where sampling occurs.
with
Therefore, the error in measuring the interval between two edges on Timer0 input = 4Tosc max.
TIMER0 TIMING WITH EXTERNAL CLOCK
OSC
the
(and a small RC delay of 20 ns)
OSC
(2)
Timer0
internal
(and a small RC delay of
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
(3)
phase
clocks
(1)
OSC
Preliminary
is
T0
)
When a prescaler is used, the external clock input is
divided by the asynchronous ripple-counter type
prescaler so that the prescaler output is symmetrical.
For the external clock to meet the sampling
requirement, the ripple-counter must be taken into
account. Therefore, it is necessary for T0CKI to have a
period of at least 4T
40 ns) divided by the prescaler value. The only
requirement on T0CKI high and low time is that they do
not violate the minimum pulse width requirement of
10 ns. Refer to parameters 40, 41 and 42 in the
electrical specification of the desired device.
6.2.2
Since the prescaler output is synchronized with the
internal clocks, there is a small delay from the time the
external clock edge occurs to the time the TMR0 is
actually incremented. Figure 6-5 shows the delay from
the external clock edge to the timer incrementing.
TIMER0 INCREMENT DELAY
T0 + 1
OSC
PIC16C62X
(and a small RC delay of
T0 + 2
Small pulse
misses sampling
DS30235G-page 33