PIC16C620 Microchip Technology, PIC16C620 Datasheet - Page 57

• Manufacturer Part Number: PIC16C620
• Description: EPROM-Based 8-Bit CMOS Microcontroller
• Manufacturer: Microchip Technology

9.6
During an interrupt, only the return PC value is saved
on the stack. Typically, users may wish to save key reg-
isters during an interrupt e.g. W register and STATUS
EXAMPLE 9-1:
register. This will have to be implemented in software.
Example 9-1 stores and restores the STATUS and W
registers. The user register, W_TEMP, must be defined
in both banks and must be defined at the same offset
from the bank base address (i.e., W_TEMP is defined
at 0x20 in Bank 0 and it must also be defined at 0xA0
in Bank 1). The user register, STATUS_TEMP, must be
defined in Bank 0. The Example 9-1:
• Stores the W register
• Stores the STATUS register in Bank 0
• Executes the ISR code
• Restores the STATUS (and bank select bit
• Restores the W register
MOVWF
SWAPF
BCF
MOVWF
SWAPF
MOVWF
SWAPF
SWAPF
1998 Microchip Technology Inc.
register)
:
:
:
Context Saving During Interrupts
W_TEMP
STATUS,W
STATUS,RP0
STATUS_TEMP
(ISR)
STATUS_TEMP,W
STATUS
W_TEMP,F
W_TEMP,W
SAVING THE STATUS AND
W REGISTERS IN RAM
;copy W to temp register,
;could be in either bank
;swap status to be saved into W
;change to bank 0 regardless
;of current bank
;save status to bank 0
;register
;swap STATUS_TEMP register
;into W, sets bank to original
;state
;move W into STATUS register
;swap W_TEMP
;swap W_TEMP into W
Preliminary
9.7
The watchdog timer is a free running on-chip RC oscil-
lator which does not require any external components.
This RC oscillator is separate from the RC oscillator of
the CLKIN pin. That means that the WDT will run, even
if the clock on the OSC1 and OSC2 pins of the device
has been stopped, for example, by execution of a
SLEEP
time-out generates a device RESET. If the device is in
SLEEP mode, a WDT time-out causes the device to
wake-up and continue with normal operation. The WDT
can be permanently disabled by programming the con-
figuration bit WDTE as clear (Section 9.1).
9.7.1
The WDT has a nominal time-out period of 18 ms, (with
no prescaler). The time-out periods vary with tempera-
ture, V
DC specs). If longer time-out periods are desired, a
prescaler with a division ratio of up to 1:128 can be
assigned to the WDT under software control by writing
to the OPTION register. Thus, time-out periods up to
2.3 seconds can be realized.
The
and the postscaler, if assigned to the WDT, and prevent
it from timing out and generating a device RESET.
The TO bit in the STATUS register will be cleared upon
a Watchdog Timer time-out.
9.7.2
It should also be taken in account that under worst case
conditions (V
WDT prescaler) it may take several seconds before a
WDT time-out occurs.
CLRWDT
DD
instruction. During normal operation, a WDT
Watchdog Timer (WDT)
WDT PERIOD
WDT PROGRAMMING CONSIDERATIONS
and process variations from part to part (see
DD
and
= Min., Temperature = Max., max.
SLEEP
PIC16C62X
instructions clear the WDT
DS30235G-page 57