PIC16C620 Microchip Technology, PIC16C620 Datasheet - Page 49

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PIC16C620

Manufacturer Part Number
PIC16C620
Description
EPROM-Based 8-Bit CMOS Microcontroller
Manufacturer
Microchip Technology
Datasheet

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9.3
The PIC16C62X differentiates between various kinds
of reset:
a)
b)
c)
d)
e)
f)
Some registers are not affected in any reset condition;
their status is unknown on POR and unchanged in any
other reset. Most other registers are reset to a “reset
FIGURE 9-7:
Note 1: This is a separate oscillator from the RC oscillator of the CLKIN pin.
V
1998 Microchip Technology Inc.
MCLR/
OSC1/
CLKIN
PP
V
Pin
Power-on reset (POR)
MCLR reset during normal operation
MCLR reset during SLEEP
WDT reset (normal operation)
WDT wake-up (SLEEP)
Brown-out Reset (BOR)
DD
Pin
Reset
On-chip
RC OSC
OST/PWRT
Brown-out
V
Module
(1)
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
detect
WDT
DD
Reset
rise
OST
PWRT
10-bit Ripple-counter
Reset
WDT
10-bit Ripple-counter
Time-out
BOREN
Power-on Reset
External
Reset
SLEEP
Preliminary
Enable PWRT
Enable OST
state” on Power-on reset, MCLR reset, WDT reset and
MCLR reset during SLEEP. They are not affected by a
WDT wake-up, since this is viewed as the resumption
of normal operation. TO and PD bits are set or cleared
differently in different reset situations as indicated in
Table 9-4. These bits are used in software to determine
the nature of the reset. See Table 9-7 for a full descrip-
tion of reset states of all registers.
A simplified block diagram of the on-chip reset circuit is
shown in Figure 9-7.
The MCLR reset path has a noise filter to detect and
ignore small pulses. See Table 12-6 for pulse width
specification.
See Table 9-3 for time-out situations.
PIC16C62X
S
R
DS30235G-page 49
Q
Q
Chip_Reset

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