MT90883 Zarlink Semiconductor, MT90883 Datasheet - Page 48

• Manufacturer Part Number: MT90883
• Description: (MT90880 - MT90883) TDM to Packet Processors
• Manufacturer: Zarlink Semiconductor

•
6.4
The diagram in Figure 24 shows a simplified, conceptual diagram of the WAN Receive Controller, demonstrating
the principles of its operation.
The WAN Receive controller receives constant bit rate TDM traffic from the WAN Interface. This interface
continually presents new timeslot data at the input, together with an indication of the timeslot and stream the
data is taken from. The timeslot pointer is used to look up the identity of the context that the timeslot is assigned
to in the context lookup table . This table is programmed by the use to contain the mapping of timeslots into
contexts.
The context ID is then used to look up information about the context from the context memory. This includes a
pointer to the data cache where the timeslot data for the context is assembled prior to being stored in the
external packet memory. The context memory also includes a number of user programmable fields controlling
the context operation, such as packet payload length, context update and context teardown.
The context control state machine controls the allocation of the data cache and other information related to the
context. It also handles the writing of the data cache contents into the external packet memory, requesting
memory access from the Memory Management Unit.
The WAN Transmit Controller functions in a similar manner, but with the data flow in reverse. The control flow
remains driven by the constant bit rate of the WAN Interface.
6.4.1
The Context Look-Up Table is the key to the control of contexts in both the WAN Receive and WAN Transmit
Controllers. This contains the mapping of individual channels into contexts, and also provides the capability to
program modifications to contexts without affecting existing channels. The fields within the context lookup table are
shown in Figure 25.
Programmable size jitter buffer size
Operation of the WAN Receive Block
Context Control in the WAN Receive/Transmit Controllers
circulating
timeslot
timeslot
pointer
data
Context ID
context
lookup
table
Figure 24 - Operation of the WAN Receive Controller
Zarlink Semiconductor Inc.
MT90880/1/2/3
context control
cache address
memory
context
state
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cache buffer
data cache
packet memory
to external
machine
Context
control
state
to memory
manager
Data Sheet