MT90883 Zarlink Semiconductor, MT90883 Datasheet - Page 60
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MT90883
Manufacturer Part Number
MT90883
Description
(MT90880 - MT90883) TDM to Packet Processors
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT90883.pdf
(97 pages)
- Current page: 60 of 97
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Fields from Packet Engine Control Register:
Traffic Class 2: Ethernet - IPv4 - UDP - CDP
Configure the mask and match registers in the packet engine to direct TDM traffic to the WAN interface.
CPU_SEL1
CPU_PRI1
Byte offset to Context Descriptor
Ethernet
Destination MAC address
Source MAC address
Length / Type field
IPv4
Version
Internet Header Length (IHL)
Type of Service (TOS)
Total Length
Identification
Flags
Fragment Offset
Time to Live (TTL)
Protocol
Header Checksum
Source IP address
Destination IP address
UDP
Source Port
Destination Port
Length
Control Register Field
Protocol Field
Table 22 - Control Register Fields for Example Traffic Class 1
Table 23 - Pattern Matching for Example Traffic Class 2
Mask
Mask
Allow match
Allow match
Allow match
Mask
Mask
Mask
Allow match
Mask
Mask
Allow Match
Mask
Mask
Allow Match
Allow match
Allow match
Mask
set to 0
don't care
18
Mask
Zarlink Semiconductor Inc.
MT90880/1/2/3
Value
If the MAC is programmed into promiscuous mode then the
destination MAC address must be matched,
0x0800 (IP)
0b0100
0d20
0b010 - Ensure set to don't fragment
0d17 (UDP)
Check the packet has the right IP address for TDM data.
Must be set to the appropriate value for TDM traffic.
Must be set to the appropriate value for TDM traffic.
60
Match / Comment
TDM traffic
Not CPU traffic
18 bytes in header before the CD
Comment
Data Sheet
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