MT90883 Zarlink Semiconductor, MT90883 Datasheet - Page 61

• Manufacturer Part Number: MT90883
• Description: (MT90880 - MT90883) TDM to Packet Processors
• Manufacturer: Zarlink Semiconductor

Fields from Packet Engine Control Register:
Traffic Class 3: Ethernet - IPv4 - xxx
Configure the mask and match registers in the packet engine to direct data traffic to an external DSP processor
on CPU DMA queue 2.
Checksum
Context Descriptor
Version
Context Switch
Context ID[11:7]
Context ID[6:0]
Remainder of the header
CPU_SEL2
CPU_PRI2
Byte offset to Context Descriptor
Ethernet
Destination MAC address
Source MAC address
Length / Type field
IPv4
Version
Internet Header Length (IHL)
Type of Service (TOS)
Total Length
Identification
Control Register Field
Protocol Field
Protocol Field
Table 23 - Pattern Matching for Example Traffic Class 2 (continued)
Table 24 - Control Register Fields for Example Traffic Class 2
Table 25 - Pattern Matching for Example Traffic Class 3
Mask
Allow match
Mask
Allow match
Mask
Mask
Mask
Mask
Allow match
Allow match
Allow match
Mask
Mask
Mask
set to 0
don't care
0d42
Mask
Mask
Zarlink Semiconductor Inc.
MT90880/1/2/3
Value
Must be 0b000
Must be 0b00000
If the MAC is programmed into promiscuous mode then the
destination MAC address must be matched,
0x0800 (IP)
0b0100
0d20
61
Match / Comment
Match / Comment
Not CPU traffic
42 bytes in header before the CD
TDM traffic
Comment
Data Sheet