MT90883 Zarlink Semiconductor, MT90883 Datasheet - Page 95

• Manufacturer Part Number: MT90883
• Description: (MT90880 - MT90883) TDM to Packet Processors
• Manufacturer: Zarlink Semiconductor

11.0
ATM
CBR
CDP
CES
DBCES
DMA
DPLL
DSP
H.100/H.110 High capacity TDM backplane standards
HDLC
H-MVIP
IP
JTAG
LAN
MAC
MII
MIB
PBSRAM
PCI
PDV
PLL
PPP
PRBS
PSTN
QoS
RMII
SSRAM
ST BUS
TDM
WAN
WFQ
WRED
ZBT
0x
0b
Glossary
test facility)
Asynchronous Transfer Mode
Constant Bit Rate
Context Descriptor Protocol (used to indicate the contents of a packet stream or "context")
Circuit Emulation Services
Dynamic Bandwidth Circuit Emulation Services
Direct Memory Access
Digital Phase Locked Loop
Digital Signal Processor
High-Level Data Link Control
High-performance Multi-Vendor Integration Protocol (a TDM backplane standard)
Internet Protocol
Joint Test Algorithms Group (generally used to refer to a standard way of providing a board-level
Local Area Network
Media Access Control
Media Independent Interface
Management Information Base
Pipelined Burst SRAM (a type of synchronous SRAM)
Peripheral Component Interconnect
Packet Delay Variation
Phase Locked Loop
Point to Point Protocol
Pseudo-Random Bit Sequence
Public Switched Telephone Circuit
Quality of Service
Reduced Media Independent Interface
Synchronous Static Random Access Memory
Standard Telecom Bus, a standard interface for TDM data streams
Time Division Multiplexing
Wide Area Network
Weighted Fair Queuing
Weighted Random Early Discard
Zero Bus Turnaround, a type of synchronous SRAM
Denotes Hexadecimal notation
Denotes binary notation
Zarlink Semiconductor Inc.
MT90880/1/2/3
95
Data Sheet