IDT70T633 Integrated Device Technology, IDT70T633 Datasheet - Page 20

• Manufacturer Part Number: IDT70T633
• Description: 512k X 18, 3.3v/2.5v Dual-port Ram, Interleaved I/o
• Manufacturer: Integrated Device Technology

Truth Table III — Interrupt Flag
Waveform of Interrupt Timing
NOTES:
1. Assumes BUSY
2. If BUSY
3. If BUSY
4. INT
5. A
NOTES:
1. All timing is the same for left and right ports. Port “A” may be either the left or right port. Port “B” is the port opposite from port “A”.
2. Refer to Interrupt Truth Table.
3. CE
4. Timing depends on which enable signal (CE or R/W) is asserted last.
5. Timing depends on which enable signal (CE or R/W) is de-asserted first.
IDT70T633/1S
High-Speed 2.5V 512/256K x 18 Asynchronous Dual-Port Static RAM
R/W
ADDR
ADDR
X
X
X
L
18x
CE
CE
X
L
R/W
L
INT
INT
OE
= V
and INT
is a NC for IDT70T631. Therefore, Interrupt Addresses are 3FFFF and 3FFFE.
"B" (3)
"A" (3)
L
R
IL
"B"
"B"
"B"
= V
"A"
"A"
"B"
= V
means CE
CE
IL
R
IL
X
X
L
L
, then no change.
, then no change.
must be initialized at power-up.
L
L
= BUSY
0
X
= V
Left Port
OE
R
X
X
X
L
IL
=V
L
and CE
IH
. CE
A
X
1
18L
7FFFF
7FFFE
X
= L means CE
= V
-A
X
X
0L
t
IH
t
AS
(5)
AS
. CE
(4)
t
INTERRUPT CLEAR ADDRESS
t
INS
(4)
INR
X
= V
INTERRUPT SET ADDRESS
INT
(4)
H
0
L
(4)
X
X
X
(3)
(2)
IH
L
= V
means CE
IL
and CE
R/W
(1)
X
X
X
L
0
(1,4)
X
R
1
= V
X
= V
t
t
WC
IH
RC
IH
and/or CE
.
CE
20
X
X
L
L
R
1
X
Right Port
= V
OE
X
X
X
L
IL
R
.
(2)
(2)
t
WR
Industrial and Commercial Temperature Ranges
A
18R
(5)
7FFFF
7FFFE
-A
X
X
0R
(5)
INT
H
L
X
X
(2)
(3)
R
Set Right INT
Reset Right INT
Set Left INT
Reset Left INT
L
Function
R
Flag
L
5670 drw 18
5670 drw 19
Flag
R
Flag
Flag
.
.
5670 tbl 17