IDT70T633 Integrated Device Technology, IDT70T633 Datasheet - Page 6

• Manufacturer Part Number: IDT70T633
• Description: 512k X 18, 3.3v/2.5v Dual-port Ram, Interleaved I/o
• Manufacturer: Integrated Device Technology

Pin Names
CE
R/W
OE
A
I/O
SEM
INT
BUSY
UB
LB
0L
IDT70T633/1S
High-Speed 2.5V 512/256K x 18 Asynchronous Dual-Port Static RAM
0L
L
0L
L
L
L
L
- A
,
L
Left Port
- I/O
L
CE
V
18L
OPT
ZZ
DDQL
1L
(1)
17L
L
L
TRST
TDO
TMS
M/S
V
V
TCK
TDI
DD
SS
R/W
I/O
CE
OE
A
SEM
INT
BUSY
UB
LB
0R
0R
R
0R
R
R
R
R
- A
Right Port
R
,
- I/O
R
CE
V
OPT
18R
ZZ
DDQR
1R
17R
(1)
R
R
Chip Enables (Input)
Read/Write Enable (Input)
Output Enable (Input)
Data Input/Output
Semaphore Enable (Input)
Interrupt Flag (Output)
Busy Flag (Output)
Upper Byte Select (Input)
Lower Byte Select (Input)
Power (I/O Bus) (3.3V or 2.5V)
Option for selecting V
Sleep Mode Pin
Master or Slave Select (Input)
Power (2.5V)
Ground (0V) (Input)
Reset (Initialize TAP Controller) (Input)
Address (Input)
Test Data Input
Test Data Output
Test Logic Clock (10MHz) (Input)
Test Mode Select (Input)
(2)
(Input)
Names
(4)
(Input)
DDQX
(2,3)
(Input)
(5)
(2)
(Input)
5670 tbl 01
6
NOTES:
1. Address A
2. V
3. OPT
4. The sleep mode pin shuts off all dynamic inputs, except JTAG inputs, when
5. BUSY is an input as a Slave (M/S=V
applying inputs on I/O
If OPT
levels and V
port's I/Os and controls will operate at 2.5V levels and V
at 2.5V. The OPT pins are independent of one another—both ports can operate
at 3.3V levels, both can operate at 2.5V levels, or either can operate at 3.3V
with the other at 2.5V.
asserted. OPTx, INTx, M/S and the sleep mode pins themselves (ZZx) are
not affected during sleep mode. It is recommended that boundry scan not be
operated during sleep mode.
(M/S=V
DD
, OPT
X
selects the operating voltage levels for the I/Os and controls on that port.
X
IH
is set to V
).
X
18
, and V
DDQX
x is a NC for IDT70T631.
Industrial and Commercial Temperature Ranges
DD
must be supplied at 3.3V. If OPT
DDQX
(2.5V), then that port's I/Os and controls will operate at 3.3V
X
.
must be set to appropriate operating levels prior to
IL
) and an output when it is a Master
X
is set to V
DDQX
SS
must be supplied
(0V), then that