HT46RB50 Holtek Semiconductor, HT46RB50 Datasheet - Page 24

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HT46RB50

Manufacturer Part Number
HT46RB50
Description
A/D Type USB 8-Bit MCU
Manufacturer
Holtek Semiconductor
Datasheet

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Clock polarity= rising (CLK) or falling (CLK): 1 or 0 (mask option)
WCOL: master/slave mode, set while writing to SBDR
when data is transferring (transmitting or receiving) and
this writing will then be ignored. WCOL function can be
enabled/disabled by mask option. WCOL is set by SIO
and cleared by users.
Data transmission and reception are still working when
the MCU enters the HALT mode.
CPOL is used to select the clock polarity of CLK. It is a
mask option.
MLS: MSB or LSB first selection
CSEN: chip select function enable/disable, CSEN=1
SCS signal function is active. Master should output SCS
signal before CLK signal is set and slave data transfer-
ring should be disabled (or enabled) before (after) SCS
signal is received. CSEN= 0, SCS signal is not needed,
Rev. 1.10
Modes
Master
Slave
4.
2.
3.
4.
5.
6.
7.
8.
1.
2.
3.
5.
6.
7.
8.
9.
1.
9.
Select CKS and select M1, M0 = 00,01,10
Select CSEN, MLS (the same as the slave)
Set SBEN
Writing data to SBDR
step 5
buffer
Check WCOL; WCOL= 1
Check TRF or waiting for SBI (serial bus interrupt)
Read data from SBDR
Clear TRF
Go to step 4
CKS don t care and select M1, M0= 11
Select CSEN, MLS (the same as the master)
Set SBEN
Writing data to SBDR
CLK
buffer and SDI data is shifted into TXRX buffer
into SBDR)
Check WCOL; WCOL= 1
Check TRF or wait for SBI (serial bus interrupt)
Read data from SBDR
Clear TRF
Go to step 4
go to step 5
data transferred, data in TXRX buffer is latched into SBDR)
(SIO internal operation
(SIO internal operations
data is stored in TXRX buffer
Operation of Serial Interface
data is stored in TXRX buffer
clear WCOL and go to step 4; WCOL= 0
clear WCOL, go to step 4; WCOL= 0
data stored in TXRX buffer, and SDI data is shifted into TXRX
24
Operations
SCS pin (master and slave) should be floating. CSEN
has 2 options: CSEN mask option is used to enable/dis-
able software CSEN function. If CSEN mask option is
disabled, the software CSEN is always disabled. If
CSEN mask option is enabled, software CSEN function
can be used.
SBEN= 1
SCS= floating (CSEN= 0); SDI= floating; SDO= 1; mas-
ter CLK= output 1/0 (dependent on CPOL mask option),
slave CLK= floating
SBEN= 0
CLK= floating
TRF is set by SIO and cleared by users. When data
transfer (transmission and reception) is completed, TRF
is set to generate SBI (serial bus interrupt).
data transferred, data in TXRX buffer is latched
CLK (SCS) received
waiting for master clock signal (and SCS):
serial bus standby; SCS (CSEN= 1) = 1;
serial bus disabled; SCS= SDI= SDO=
output CLK (and SCS) signals
go to step 6
go to step 6
output data in TXRX
September 7, 2006
HT46RB50
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