HT46RB50 Holtek Semiconductor, HT46RB50 Datasheet - Page 31

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HT46RB50

Manufacturer Part Number
HT46RB50
Description
A/D Type USB 8-Bit MCU
Manufacturer
Holtek Semiconductor
Datasheet

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Note:
Application Circuits
Note:
Rev. 1.10
No.
17*
10
11
12
13
14
15
16
7
8
9
*: The purpose of this option is to enable the endpoint that will be used, and disable the endpoint that will not be
The resistance and capacitance for reset circuit should be designed in such a way as to ensure that the VDD is
stable and remains within a valid operating voltage range before bringing RES to high.
X1 can use 6MHz or 12MHz, X1 as close to OSC1 and OSC2 as possible
Components with * are used for EMC issue
22pF capacitance are used for resonator only
used.
PWM selection: (7+1) or (6+2) mode
PD0: level output or PWM0 output
PD1: level output or PWM1 output
SIO (Serial Interface) enable/disable (if SIO is enabled then PE0~PE3 I/O port will be disabled)
SIO_ CPOL: Clock polarity 1/0: clock polarity rising or falling edge
SIO_WCOL: Enable/disable
SIO_CSEN: Enable/disable, CSEN mask option is used to enable/disable (1/0) software CSEN function
WDT enable/disable
WDT clock source: f
WDT timeout period: 2
PA0~PA7 wake-up enable/disable (by bit)
EP1~EP3 Data pipe enable: EP1, EP2, EP3 enable/disable. (Default is enable)
CLRWDT instruction (s): 1 or 2
SYS
12
/4 or WDTOSC
/f
S
~2
13
/f
S
, 2
13
/f
S
~2
14
31
/f
S
Option
, 2
14
/f
S
~2
15
/f
S
, 2
15
/f
S
~2
16
/f
S
September 7, 2006
HT46RB50

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