HT46RB50 Holtek Semiconductor, HT46RB50 Datasheet - Page 6

• Manufacturer Part Number: HT46RB50
• Description: A/D Type USB 8-Bit MCU
• Manufacturer: Holtek Semiconductor

Functional Description
Execution Flow
The system clock is derived from a crystal. It is internally
divided into four non-overlapping clocks. One instruc-
tion cycle consists of four system clock cycles. Instruc-
tion fetching and execution are pipelined in such a way
that a fetch takes one instruction cycle while decoding
and execution takes the next instruction cycle. The
pipelining scheme makes it possible for each instruction
to be effectively executed in a cycle. If an instruction
changes the value of the program counter, two cycles
are required to complete the instruction.
Program Counter - PC
The program counter (PC) is 12 bits wide and it controls
the sequence in which the instructions stored in the pro-
gram ROM are executed. The contents of the PC can
specify a maximum of 4096 addresses. After accessing
a program memory word to fetch an instruction code,
the value of the PC is incremented by 1. The PC then
Note:
Rev. 1.10
Initial Reset
External Interrupt
Timer/Event Counter 0 Overflow
Timer/Event Counter 1 Overflow
USB Interrupt
A/D Converter Interrupt
Serial Interface Interrupt
Skip
Loading PCL
Jump, Call Branch
Return from Subroutine
*11~*0: Program counter bits
#11~#0: Instruction code bits
Mode
S11
#11
*11
*11
0
0
0
0
0
0
0
S10
#10
*10
*10
0
0
0
0
0
0
0
Program Counter
Execution Flow
S9
#9
*9
*9
0
0
0
0
0
0
0
#8
S8
6
*8
*8
0
0
0
0
0
0
0
points to the memory word containing the next instruc-
tion code. When executing a jump instruction, condi-
tional skip execution, loading a PCL register, a
subroutine call, an initial reset, an internal interrupt, an
external interrupt, or returning from a subroutine, the PC
manages the program transfer by loading the address
corresponding to each instruction.
The conditional skip is activated by instructions. Once
the condition is met, the next instruction, fetched during
the current instruction execution, is discarded and a
dummy cycle replaces it to get a proper instruction, oth-
erwise proceed to the next instruction.
The lower byte of the PC (PCL) is a readable and
writeable register (06H). Moving data into the PCL per-
forms a short jump. The destination is within 256 loca-
tions.
When a control transfer takes place, an additional
dummy cycle is required.
S11~S0: Stack register bits
@7~@0: PCL bits
@7
S7
#7
*7
0
0
0
0
0
0
0
Program Counter+2
Program Counter
@6
S6
#6
*6
0
0
0
0
0
0
0
@5
S5
#5
*5
0
0
0
0
0
0
0
@4
S4
#4
*4
0
0
0
0
1
1
1
@3
#3
S3
*3
0
0
1
1
0
0
1
September 7, 2006
@2
S2
#2
*2
0
1
0
1
0
1
0
HT46RB50
@1
S1
#1
*1
0
0
0
0
0
0
0
@0
S0
#0
*0
0
0
0
0
0
0
0