DS2196 Dallas Semiconducotr, DS2196 Datasheet - Page 14

• Manufacturer Part Number: DS2196
• Description: T1 Dual Framer LIU
• Manufacturer: Dallas Semiconducotr

Signal Name:
Signal Description:
Signal Type:
Updated on the rising edge of TCLKA or TCLKB with either bipolar data or a frame sync pulse out of the transmit
side formatter. This pin can be programmed to source the frame sync pulse via the Output Data Format (CCR1A.6
and CCR1B.6) control bits.
Receive Framer Pins
Signal Name:
Signal Description:
Signal Type:
A dual function pin depending on the setting of the CCR4A.1 and CCR4B.1 control bits. If RCHCLK is selected, a
192-kHz clock, which pulses high during the LSB of each channel, will be output. If RLCLK is selected, either a 4
kHz or 2 kHz (ZBTSI) clock for the RLINK data is output. This output signal is always synchronous with RCLKA
or RCLKB.
Signal Name:
Signal Description:
Signal Type:
A dual function pin depending on the setting of the CCR4A.1 and CCR4B.1 control bits. If RCHBLK is selected, a
user programmable output that can be forced high or low during any of the 24 T1 channels. Useful for blocking
clocks to a serial UART or LAPD controller in applications where not all T1 channels are used such as Fractional
T1, 384 kbps service, 768 kbps, or ISDN–PRI. Also useful for locating individual channels in drop–and–insert
applications, for external per–channel loopback, and for per–channel conditioning. See Section 21 for details. If
RLINK is selected, then either FDL data (ESF) or Fs bits (D4) or Z bits (ZBTSI) one RCLKA before the start of a
frame are output. See Section 21 for details. This signal is always synchronous with RCLKA or RCLKB.
Signal Name:
Signal Description:
Signal Type:
Received NRZ serial data. Updated on rising edges of RCLKA or RCLKB.
Signal Name:
Signal Description:
Signal Type:
An extracted pulse, one RCLKA or RCLKB wide, is output at this pin which identifies frame boundaries. Via
RCR2A.5 and RCR2B.5, RFSYNC can also be set to output double–wide pulses on signaling frames. This signal
is always synchronous with RCLKA or RCLKB
Signal Name:
Signal Description:
Signal Type:
An extracted pulse, one RCLKA or RCLKB wide, is output at this pin which identifies multiframe boundaries.
This signal is always synchronous with RCLKA or RCLKB.
TNEGA/B / TFSYNCA/B
Transmit Negative Data & Frame Sync Pulse Output
Output
RCHCLKA/B / RLCLKA/B
Receive Channel Clock / Receive Link Clock
Output
RCHBLKA/B / RLINKA/B
Receive Channel Block / Receive Link Data
Output
RSERA/B
Receive Serial Data
Output
RFSYNCA/B
Receive Frame Sync
Output
RMSYNCA/B
Receive Multiframe Sync
Output
.
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