AN1849 Motorola / Freescale Semiconductor, AN1849 Datasheet - Page 13

• Manufacturer Part Number: AN1849
• Description: MPC107 Design Guide
• Manufacturer: Motorola / Freescale Semiconductor

SDMA(13:0)
SDBA(0:1)
DQM(7:0)
CS0
CS1
CS(2:7)
SDRAS
SDCAS
WE
CKE
MDH(0:31)
MDL(0:31)
PAR(0:7)
none
Notes:
1. For DIMMS, CS0 and CS2 should be connected to one CS pin to enable 64-bit data mode. CS1 and CS3 should
2. No known SODIMM module actually implements parity.
3. Connect pins together.
4. The MSB of the 32-bit data buses (MDH0 and MDL0) must be connected to the MSB of the SDRAM (D0) to
5. Note that the memory address bus is “little-endian”, so A0 is the LSB.
The remaining memory connections can be connected from point-to-point. Table 6 shows a list of the
interconnections between the MPC107 and a typical DIMM or SODIMM module. Note that, unlike most
PowerPC buses, the memory buses (with the exception of the data bus) use industry-standard little-endian
notation, where A0 is the least-significant-bit of the addresses.
MPC107 Signal
be connected to a second CS pin if a second (physical) bank will be supported.
preserve the association between DQM and MDH/MDL. The connections shown maintain this order.
E10, F9, D9, F8, E8,
D8, B8, E7, C7, B7, A7,
B6, A6, A5
A9, A8
D11, F12, C2, B3,
A10, A11, B1, A2
E6
C4
D5, E4,
C10, F11, B10, B11
B4
D4
A3
A12
M6, L4, L6, K2, K4, K5,
J4, J6, H4, H5, G3, G5,
G6, F5, F1, E1, B14,
D15, B15, E16, D16,
C16, D18, D17, B17,
F18, E19, E20, B19,
B20, B21, A22
M5, L1, L2, K1, K3, J1,
J2, H1, H2, H6, G2, G4,
F4, G1, F2, E2, F14,
F15, A16, F17, B16,
A17, A18, A19, B18,
E18, D19, F19, A20,
C19, D20, A21
D2, C1, A15, A14, D1,
D3, F13, C13
none
Table 6. MPC107 Memory Address Pin Connections
Pin
MPC107 Design Guide
A(13:0)
BA(0:1)
DQM(7:0)
CS
CS
CS
SDRAS
SDCAS
WE
CKE
D(0:31)
D(32:63)
DP(0:7)
REGE
SDRAM
Name
132, 126, 123, 38, 121,
37, 120, 36, 119, 35,
118, 34, 117, 33
122, 39
131, 130, 113, 112
47, 46, 29, 28
30+45
114+129
30+45 or 114+129
115
111
27
63+128
2, 3, 4, 5, 7, 8, 9, 10, 11,
13, 14, 15, 16, 17, 19,
20, 55, 56, 57, 58, 60,
65, 66, 67, 69, 70, 71,
72, 74, 75, 76, 77
86, 87, 88, 89, 91, 92,
93, 94, 95, 97, 98, 99,
100, 101, 103, 104, 139,
140, 141, 142, 144, 149,
150, 151, 153, 154, 155,
156, 158, 159, 160, 161
21, 22, 52, 53,
105, 106, 136, 137
147
JEDEC 168 pin
SDRAM DIMM
57, 59, 77, 79,
58, 60, 78, 80
72, 70, 112, 111, 109,
105, 104, 103, 34, 32,
30, 33, 31, 29
106, 110
118, 117, 26, 24,
117, 115, 25, 23
69
71
69 or 71
65
66
67
62+68
3, 5, 7, 9, 13, 15, 17,
19, 37, 39, 41, 43, 47,
49, 51, 53, 83, 85, 87,
89, 93, 95, 97, 99, 121,
123, 125, 127, 131,
133, 135, 137
4, 6, 8, 10, 14, 16, 18,
20, 38, 40, 42, 44, 48,
50, 52, 54, 84, 86, 88,
90, 94, 96, 98, 100,
122, 124, 126, 128,
132, 134, 136, 138
none
SDRAM SODIMM
JEDEC 144-pin
Memory Architecture
5
1
1
1
3
4
4
2
Notes
13