AN2153 Freescale Semiconductor / Motorola, AN2153 Datasheet - Page 11

• Manufacturer Part Number: AN2153
• Description: A Serial Bootloader for Reprogramming the MC9S12DP256 FLASH Memory
• Manufacturer: Freescale Semiconductor / Motorola

AN2153
MOTOROLA
NOTE:
are implemented as a 2-stage first in, first out (FIFO) command buffer.
This configuration allows a new command to be issued while the
hardware state machine completes the previously issued command.
The main reason for this design is to decrease programming time.
Without the 2-stage FIFO command buffer, the programing voltage
would have to be removed from the FLASH array at the end of each
program command to avoid exceeding the high voltage active time, t
specification. Applying and removing the programming voltage after
each program command would double the time required to program an
aligned word. If program commands are continuously available to the
state machine, it will keep high voltage applied to the array if the program
command operates on the same 64-byte row. If the command in the
second stage of the FIFO buffer has changed, the address is not within
the same 64-byte row or the command buffer is empty, the high voltage
will be removed and reapplied with a new command if required.
To aid the development of a multitasking environment where the CPU
can perform other tasks while performing program and erase operations,
the FLASH module control registers provide the ability to generate
interrupts when a command completes or the command buffer is empty.
When the command buffers empty interrupt enable (CBEIE) bit is set, an
interrupt is generated whenever the command buffers empty interrupt
flag (CBEIF) is set. When the command complete interrupt enable
(CCIE) bit is set, an interrupt is generated when the command complete
interrupt flag (CCIF) is set. Note that the CCIF flag is set at the
completion of each command while the CBEIF is set when both stages
of the FIFO are empty.
Because the interrupt vectors are located in FLASH block zero, memory
locations in block zero cannot be erased or programmed when utilizing
FLASH interrupts in a target application.
The command register and the associated address and data registers
Freescale Semiconductor, Inc.
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Overview of the MC9S12DP256’s FLASH
Application Note
HV
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