AN2153 Freescale Semiconductor / Motorola, AN2153 Datasheet - Page 17

• Manufacturer Part Number: AN2153
• Description: A Serial Bootloader for Reprogramming the MC9S12DP256 FLASH Memory
• Manufacturer: Freescale Semiconductor / Motorola

General FLASH Serial Bootloader Requirements
AN2153
MOTOROLA
A program such as the FLASH serial bootloader has two important
requirements. First, it must have minimal impact on the final product’s
software performance. Second, it should add little or no cost to the
hardware design. Because the MC9S12DP256 includes a variety of
on-chip communications modules, five CAN modules, one J1850
module, two SCI ports, and three SPI modules, no additional external
hardware should be required. Designs incorporating a CAN or J1850
network connection could easily incorporate the existing connection into
the bootloader to download the new FLASH data. For applications not
utilizing a network connection in the basic design, one of the two SCI
ports can be used. In many systems, the SCI may be a part of the
hardware design since it is often used as a diagnostic port. If an RS232
level translator is not included as part of the system design, a small
adapter board can be constructed containing the level translator and
RS232 connector. This board can then be used by service personnel to
update the system firmware. Using such an adapter board prevents the
cost of the level translator and connector from being added to each
system. In addition to the SCI port, a single input pin is required to notify
the serial bootloader startup code to execute the bootloader code or
jump to the system application program.
As mentioned previously, because the MC9S12DP256’s interrupt and
reset vectors reside in the protected bootblock, they cannot be changed
without erasing the bootblock itself. Even though it is possible to erase
and reprogram the bootblock, it is inadvisable to do so. If anything goes
wrong during the process of reprogramming the bootblock, it would be
impossible to recover from the situation without the use of BDM
programming hardware. For this reason, a bootloader should include
support for a secondary interrupt and reset vector table located just
below the protected bootblock area. Each entry in the secondary
interrupt table should consist of a 2-byte address mirroring the primary
interrupt and reset vector table. The secondary interrupt and reset vector
table is utilized by having each vector point to a single JMP instruction
that uses the CPU12’s indexed-indirect program counter relative
addressing mode. This form of the JMP instruction uses four bytes of
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General FLASH Serial Bootloader Requirements
Application Note
17