AN2727 Freescale Semiconductor / Motorola, AN2727 Datasheet - Page 10

• Manufacturer Part Number: AN2727
• Description: Designing Hardware for the HCS12 D-Family
• Manufacturer: Freescale Semiconductor / Motorola

Pin Considerations Collection – Control
Pin Considerations Collection – Control
There are several control pins on the device that require special consideration at the design stage:
TEST Pin
This pin should always be grounded in an application.
This is a digital input and presents a static load; it can, therefore, be connected to the oscillator ground
return without concern.
RESET Pin
This is an open-drain, active-low, bidirectional control pin. It requires an external pull-up.
On assertion of any reset, the MCU releases internal control of the reset pin after 128 SYSCLK cycles,
and then samples the reset pin after a further 64 SYSCLK cycles. If the pin reads low, the MCU
determines that this was an external reset request and takes the external/POR reset vector. If it reads
high, the MCU tests the internal reset sources and takes the appropriate reset vector.
If the time constant of external devices connected to the reset pin is too long, an internally generated reset
may be detected as an external reset. If the desired application reset behavior is the same for all reset
sources, this is not an issue; however, some applications may require different behavior for different reset
sources.
To guarantee that the internal reset vectors (COP and CM) can be recognized by the reset logic then the
rise time for the reset pin to reach 3.25V (a guaranteed input logic 1 for VDD5 = 5V) must be less than 64
oscillator (SYSCLK) cycles AND less than 11 µs (64 f
cycles @ 5.5 MHz).
SCM
1
There is no LVR
support on the HCS12 D-family. It is recommended to use an external LVR circuit to
hold the device in reset if the VVD5 supply drops below 4.5V.
Port E.7 : XCLKS Pin
This is a GPIO pin that is also used to control the oscillator configuration on reset.
The XCLKS state is latched at the rising edge of reset, so it important that the logic state of this pin be
clearly defined on release of reset.
If the input is a logic low, the oscillator is configured for an external clock drive on EXTAL or as a Pierce
Oscillator (not available on MC9S12D256x K36N and K79X masks). If this input is a logic high, a Colpitts
oscillator circuit is configured on EXTAL and XTAL.
1. Low voltage reset.
Designing Hardware for the HCS12 D-Family, Rev. 0
10
Freescale Semiconductor