AN2727 Freescale Semiconductor / Motorola, AN2727 Datasheet - Page 25

• Manufacturer Part Number: AN2727
• Description: Designing Hardware for the HCS12 D-Family
• Manufacturer: Freescale Semiconductor / Motorola

A useful feature of the PIM is that when an interrupt is enabled on one of the ports the appropriate pull
device for the selected edge polarity is enabled:
Ports M and S can also be configured on a pin-by-pin basis for
All GP I/O pins default to input on assertion of reset. Some are high impedance with no pull devices
enabled, and some have pull-ups enabled. This is reflected in the default value of the associated Data
Direction Registers (xDDR).
To achieve minimum STOP / WAIT IDD, internal I/O pull devices should be configured by the application
software so as not to conflict with external pin loads.
Freescale Semiconductor
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falling edge = pull-up enabled
rising edge = pull-down enabled
Open drain for wired-or connections. Useful for connecting multiple communications peripherals to
the same bus.
PAD
Figure 7. Illustration of Typical PIM GPIO Pin Functionality
Designing Hardware for the HCS12 D-Family, Rev. 0
0
1
0
1
module enable
output enable
Pin Considerations — General Purpose I/O
0
1
data out
DDR
PTI
PT
Module
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