AN2727 Freescale Semiconductor / Motorola, AN2727 Datasheet - Page 24

• Manufacturer Part Number: AN2727
• Description: Designing Hardware for the HCS12 D-Family
• Manufacturer: Freescale Semiconductor / Motorola

Pin Considerations — General Purpose I/O
digital data output stream, unless the reference potential is sensed at the reference input pin and any
potential drop compensated for.
Due to the sample-and-hold mechanism of the HCS12 ATD, charge-sharing between the external and the
internal capacitances can cause a small voltage drop. Each analog input should have a capacitor, with
good high frequency characteristics, between the input pin and V
capacitance will be application dependent; a basic guideline for minimizing the effect of this charge
sharing is to keep the external capacitor greater than C
of the specific device user guide.
The source impedance of the signal driver must also be considered when choosing the capacitor size.
Optimizing the source impedance may be a compromise:
A basic guideline for minimizing the effect of input leakage is as described in the data sheets. When VREF
= VRH-VRL = 5.12 V, one 8-bit count = 20 mV and one 10-bit count = 5 mV
See Application Note AN2429 for further details and considerations on interfacing to the ATD ports.
Port Integration Module (PIM) GPIO Ports
Ports H, J, P, M, and S support hardware interrupt functionality and alternative peripheral functionality.
Registers for these ports are located in the Port Integration Module (PIM). The PIM automatically switches
control of each I/O as appropriate when a peripheral function is enabled for a specific pin.
Each PIM port pin can be configured on a pin-by-pin basis for:
Ports H, J and P can also be configured on a pin-by-pin basis for:
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For a maximum 10-bit sampling error of the input voltage ≤ 1 LSB, the external filter capacitor (C
should be ≥ 1024 * (C
For an 8-bit conversion, 1 LSB is four times larger, so the minimum source capacitance for ≤ 1 LSB
error is 256 * (C
External source impedance combined with the input capacitor will create a low-pass anti-aliasing
filter, which can be used to attenuate unwanted frequency components and noise. Higher source
impedance can result in rolling off of higher frequency components of interest in the input signals.
Higher source impedance reduces current injection when the input exceeds the rail voltages.
Lower source impedance avoids and reduces the error generated by input leakage (I
maximum external source impedance of an analog signal is limited by the leakage into the pin.
For a maximum 10-bit error of < 1/2 LSB, R
For a maximum 8-bit error of < 1/2 LSB, R
I/P or O/P function.
Internal pull-up / pull-down. Approximately 100 µA load when driven by an external source
Full or reduced drive strength. Useful for controlling EMC on SPI lines and PWM, for example.
Edge sensitive interrupt inputs with glitch filtering. These can be used to wake the device from low
power modes.
INS
-C
INN
INS
Designing Hardware for the HCS12 D-Family, Rev. 0
) or ≥ 3 nF.
-C
INN
)
or ≥ 12 nF.
S
S
should be
should be
f
as defined in the Electrical Characteristics section
≤
≤
10 kΩ (= 10mV / 1 µA)
2.5 kΩ (= 2.5 mV / 1 µA)
SSA
. The size of the external source
Freescale Semiconductor
in
). The
f
)