FDC37M81x SMSC Corporation, FDC37M81x Datasheet - Page 174

• Manufacturer Part Number: FDC37M81x
• Description: PC98/99 Compliant Enhanced Super I/O Controller
• Manufacturer: SMSC Corporation

NAME
KDAT/
MDAT
KCLK/
MCLK
t1
t2
t3
t4
t5
t6
Time from DATA transition to falling edge of CLOCK
(Receive)
Time from rising edge of CLOCK to DATA transition
(Receive)
Duration of CLOCK inactive (Receive/Send)
Time to keyboard inhibit after clock 11 to ensure the
keyboard does not start another transmission (Receive)
Time from inactive to active CLOCK transition, used to time
when the auxiliary device samples DATA (Send)
Duration of CLOCK active (Receive/Send)
t1
Start Bit
FIGURE 8 - KEYBOARD/MOUSE RECEIVE/SEND DATA TIMING
CLK
t3
1
t2
t6
t4
Bit 0
CLK
2
DESCRIPTION
174
Bit 7
CLK
9
Parity Bit
CLK
10
MIN
30
30
>0
5
5
5
TYP
Stop Bit
t5
CLK
11
MAX
T4-5
25
50
50
50
25
UNITS
µsec
µsec
µsec
µsec
µsec
µsec