FDC37M81x SMSC Corporation, FDC37M81x Datasheet - Page 19
FDC37M81x
Manufacturer Part Number
FDC37M81x
Description
PC98/99 Compliant Enhanced Super I/O Controller
Manufacturer
SMSC Corporation
Datasheet
1.FDC37M81X.pdf
(198 pages)
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PS/2 Model 30 Mode
BIT 0 nDRIVE SELECT 2
The DS2 disk interface is not supported in the
FDC37M81x.
BIT 1 nDRIVE SELECT 3
The DS3 disk interface is not supported in the
FDC37M81x.
BIT 2 WRITE GATE
Active high status of the latched WGATE output
signal. This bit is latched by the active going edge
of WGATE and is cleared by the read of the DIR
register.
BIT 3 READ DATA
Active high status of the latched RDATA output
signal. This bit is latched by the inactive going
edge of RDATA and is cleared by the read of the
DIR register.
RESET
COND.
nDRV2
N/A
7
nDS1
6
1
nDS0
5
1
WDATA
F/F
4
0
19
BIT 4 WRITE DATA
Active high status of the latched WDATA output
signal. This bit is latched by the inactive going
edge of WDATA and is cleared by the read of the
DIR register. This bit is not gated with WGATE.
BIT 5 nDRIVE SELECT 0
Active low status of the DS0 disk interface output.
BIT 6 nDRIVE SELECT 1
Active low status of the DS1 disk interface output.
BIT 7 nDRV2
Active low status of the DRV2 disk interface input.
FDC37M81x.
Note:
RDATA
F/F
3
0
This function is not supported in the
WGATE
F/F
2
0
nDS3
1
1
nDS2
0
1
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