LM3S1607 Luminary Micro, Inc, LM3S1607 Datasheet - Page 23
LM3S1607
Manufacturer Part Number
LM3S1607
Description
Lm3s1607 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S1607.pdf
(548 pages)
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June 02, 2008
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Internal Memory
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DMA Controller
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Integrated Nested Vectored Interrupt Controller (NVIC) providing deterministic interrupt
handling
27 interrupts with eight priority levels
Memory protection unit (MPU), providing a privileged mode for protected operating system
functionality
Unaligned data access, enabling data to be efficiently packed into memory
Atomic bit manipulation (bit-banding), delivering maximum memory utilization and streamlined
peripheral control
128 KB single-cycle flash
•
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•
32 KB single-cycle SRAM
Pre-programmed ROM containing the Stellaris
and Stellaris
ARM PrimeCell® 32-channel configurable µDMA controller
Support for multiple transfer modes:
•
•
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Dedicated channels for supported peripherals
One channel each for receive and transmit path for bidirectional peripherals
Dedicated channel for software-initiated transfers
Independently configured and operated channels
Per-channel configurable bus arbitration scheme
Two levels of priority
Design optimizations for improved bus access performance between µDMA controller and
the processor core:
•
User-managed flash block protection on a 2-KB block basis
User-managed flash data programming
User-defined and managed flash-protection block
Basic, for simple transfer scenarios
Ping-pong, for continuous data flow to/from peripherals
Scatter-gather, from a programmable list of arbitrary transfers initiated from a single request
µDMA controller access is subordinate to core access
®
boot loader
Preliminary
®
family peripheral driver library (DriverLib)
LM3S1607 Microcontroller
23
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