LM3S1607 Luminary Micro, Inc, LM3S1607 Datasheet - Page 496
LM3S1607
Manufacturer Part Number
LM3S1607
Description
Lm3s1607 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S1607.pdf
(548 pages)
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Signal Tables
496
Power
SSI
Function
TCK
TDI
TDO
TMS
GND
GND
GND
GND
GND
GND
GND
GND
GND
GNDA
HIB
LDO
VBAT
VDD
VDD
VDD
VDD
VDD25
VDD25
VDD25
VDD25
VDDA
WAKE
SSI0Clk
Pin Name
Number
Pin
52
50
49
51
10
13
24
29
36
39
44
53
60
33
37
12
28
43
59
23
38
54
32
19
4
7
9
3
Preliminary
Pin Type
I/O
I/O
O
O
I
I
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
I
Buffer
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Type
TTL
TTL
TTL
TTL
TTL
OD
-
JTAG/SWD CLK
JTAG TDI
JTAG TDO and SWO
JTAG TMS and SWDIO
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
The ground reference for the analog circuits (ADC,
Analog Comparators, etc.). These are separated
from GND to minimize the electrical noise contained
on VDD from affecting the analog functions.
An output that indicates the processor is in
hibernate mode.
Low drop-out regulator output voltage. This pin
requires an external capacitor between the pin and
GND of 1 µF or greater. The LDO pin must also be
connected to the VDD25 pins at the board level in
addition to the decoupling capacitor(s).
Power source for the Hibernation Module. It is
normally connected to the positive terminal of a
battery and serves as the battery
backup/Hibernation Module power-source supply.
Positive supply for I/O and some logic.
Positive supply for I/O and some logic.
Positive supply for I/O and some logic.
Positive supply for I/O and some logic.
Positive supply for most of the logic function,
including the processor core and most peripherals.
Positive supply for most of the logic function,
including the processor core and most peripherals.
Positive supply for most of the logic function,
including the processor core and most peripherals.
Positive supply for most of the logic function,
including the processor core and most peripherals.
The positive supply (3.3 V) for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from VDD to minimize the electrical noise
contained on VDD from affecting the analog
functions.
An external input that brings the processor out of
hibernate mode when asserted.
SSI module 0 clock
Description
June 02, 2008
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