IDT72V3673L10PF IDT, Integrated Device Technology Inc, IDT72V3673L10PF Datasheet - Page 25

• Manufacturer Part Number: IDT72V3673L10PF
• Description: IC SYNCFIFO 8192X36 10NS 128TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: 72Vr

Specifications of IDT72V3673L10PF

• Function: Asynchronous, Synchronous
• Memory Size: 288K (8K x 36)
• Data Rate: 100MHz
• Access Time: 10ns
• Voltage - Supply: 3.15 V ~ 3.45 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 128-TQFP, 128-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 72V3673L10PF

NOTES:
1. t
2. FIFO Write (CSA = LOW, W/RA = HIGH, MBA = LOW), FIFO read (CSB = LOW, W/RB = HIGH, MBB = LOW). Data in the FIFO output register has been read from the FIFO.
3. D = Maximum FIFO Depth = 2,048 for the IDT72V3653, 4,096 for the IDT72V3663, 8,192 for the IDT72V3673.
4. If Port B size is word or byte, t
NOTE:
1. If Port B is configured for word size, data can be written to the Mail1 Register using A0-A17 (A18-A35 are don't care inputs). In this first case B0-B17 will have valid data (B18-B35 will
CLKA
CLKB
IDT72V3653/72V3663/72V3673 3.3V CMOS SyncFIFO
BUS-MATCHING 2,048 x 36, 4,096 x 36, and 8,192 x 36
B0-B35
A0-A35
ENB
ENA
CLKB edge is less than t
be indeterminate). If Port B is configured for byte size, data can be written to the Mail1 Register using A0-A8
(A9-A35 are don't care inputs). In this second case, B0-B8 will have valid data (B9-B35 will be indeterminate).
SKEW2
CLKA
W/RA
CLKB
MBF1
W/RB
AF
MBA
MBB
CSB
CSA
ENA
ENB
is the minimum time between a rising CLKA edge and a rising CLKB edge for AF to transition HIGH in the next CLKA cycle. If the time between the rising CLKA edge and rising
[D-(Y+1)] Words in FIFO
SKEW2
t
ENS2
SKEW2
Figure 16. Timing for AF
, then AF may transition HIGH one CLKA cycle later than shown.
Figure 17. Timing for Mail1 Register and MBF1
is referenced from the rising CLKB edge that reads the last word or byte of the long word, respectively.
t
FIFO Output Register
EN
t
t
t
t
t
t
ENS1
ENS2
ENS2
ENS1
PAF
t
ENH
DS
W1
AF AF
AF
AF when the FIFO is Almost-Full (IDT Standard and FWFT Modes).
t
MDV
t
ENH
TM
t
t
t
t
ENH
DH
ENH
ENH
t
PMF
t
WITH
ENS2
t
PMR
MBF1
MBF1
MBF1 Flag (IDT Standard and FWFT Modes)
MBF1
25
t
SKEW2
t
(D-Y) Words in FIFO
ENH
W1 (Remains valid in Mail1 Register after read)
(1)
1
t
ENS2
COMMERCIAL TEMPERATURE RANGE
t
ENH
t
PMF
2
t
PAF
t
DIS
4662 drw19
4662 drw 18