IDT72V3673L10PF IDT, Integrated Device Technology Inc, IDT72V3673L10PF Datasheet
IDT72V3673L10PF
Specifications of IDT72V3673L10PF
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IDT72V3673L10PF Summary of contents
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FEATURES • • • • • Memory storage capacity: IDT72V3653 – 2,048 x 36 IDT72V3663 – 4,096 x 36 IDT72V3673 – 8,192 x 36 • • • • • Clock frequencies up to 100 MHz (6.5 ns access time) • ...
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IDT72V3653/72V3663/72V3673 3.3V CMOS SyncFIFO BUS-MATCHING 2,048 x 36, 4,096 x 36, and 8,192 x 36 DESCRIPTION The IDT72V3653/72V3663/72V3673 are pin and functionally compatible versions of the IDT723653/723663/723673, designed to run off a 3.3V supply for exceptionally low power consumption. These ...
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IDT72V3653/72V3663/72V3673 3.3V CMOS SyncFIFO BUS-MATCHING 2,048 x 36, 4,096 x 36, and 8,192 x 36 each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional ...
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IDT72V3653/72V3663/72V3673 3.3V CMOS SyncFIFO BUS-MATCHING 2,048 x 36, 4,096 x 36, and 8,192 x 36 PIN DESCRIPTIONS Symbol Name I/O A0-A35 Port A Data I/O AE Almost-Empty Flag O (Port B) AF Almost-Full Flag O (Port A) B0-B35 Port B ...
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IDT72V3653/72V3663/72V3673 3.3V CMOS SyncFIFO BUS-MATCHING 2,048 x 36, 4,096 x 36, and 8,192 x 36 PIN DESCRIPTIONS (CONTINUED) Symbol Name I/O MBA Port A Mailbox Select MBB Port B Mailbox Select MBF1 Mail1 Register Flag MBF2 Mail2 Register Flag RS1, ...
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IDT72V3653/72V3663/72V3673 3.3V CMOS SyncFIFO BUS-MATCHING 2,048 x 36, 4,096 x 36, and 8,192 x 36 ABSOLUTE MAXIMUM RATINGS OVER OPERATING FREE-AIR TEMPERATURE RANGE (Unless otherwise noted) Symbol V Supply Voltage Range Input Voltage Range I ( (2) ...
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IDT72V3653/72V3663/72V3673 3.3V CMOS SyncFIFO BUS-MATCHING 2,048 x 36, 4,096 x 36, and 8,192 x 36 DETERMINING ACTIVE CURRENT CONSUMPTION AND POWER DISSIPATION The I current for the graph in Figure 1 was taken while simultaneously reading and writing a FIFO ...
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IDT72V3653/72V3663/72V3673 3.3V CMOS SyncFIFO BUS-MATCHING 2,048 x 36, 4,096 x 36, and 8,192 x 36 TIMING REQUIREMENTS OVER RECOMMENDED RANGES OF SUPPLY VOLTAGE AND OPERATING FREE-AIR TEMPERATURE (For 10ns speed grade only: Vcc = 3.3V 0.15V ± Symbol Parameter f ...
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IDT72V3653/72V3663/72V3673 3.3V CMOS SyncFIFO BUS-MATCHING 2,048 x 36, 4,096 x 36, and 8,192 x 36 SWITCHING CHARACTERISTICS OVER RECOMMENDED RANGES OF SUPPLY VOLTAGE AND OPERATING FREE-AIR TEMPERATURE, C (For 10ns speed grade only: Vcc = 3.3V 0.15V ± Symbol Parameter ...
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IDT72V3653/72V3663/72V3673 3.3V CMOS SyncFIFO BUS-MATCHING 2,048 x 36, 4,096 x 36, and 8,192 x 36 SIGNAL DESCRIPTION RESET (RS1, RS2) After power up, a Reset operation must be performed by providing a LOW pulse to RS1 and RS2 simultaneously. Afterwards, ...
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IDT72V3653/72V3663/72V3673 3.3V CMOS SyncFIFO BUS-MATCHING 2,048 x 36, 4,096 x 36, and 8,192 x 36 TABLE 1 — FLAG PROGRAMMING FS2 FS1/SEN FS0/ ...
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IDT72V3653/72V3663/72V3673 3.3V CMOS SyncFIFO BUS-MATCHING 2,048 x 36, 4,096 x 36, and 8,192 x 36 TABLE 2 — — — — — PORT-A ENABLE FUNCTION TABLE CSA W/RA ENA ...
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IDT72V3653/72V3663/72V3673 3.3V CMOS SyncFIFO BUS-MATCHING 2,048 x 36, 4,096 x 36, and 8,192 x 36 synchronized to CLKB. Table 4 shows the relationship of each port flag to the number of words stored in memory. EMPTY/OUTPUT READY FLAGS (EF/OR) These ...
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IDT72V3653/72V3663/72V3673 3.3V CMOS SyncFIFO BUS-MATCHING 2,048 x 36, 4,096 x 36, and 8,192 x 36 MAILBOX REGISTERS Two 36-bit bypass registers are on the IDT72V3653/72V3663/72V3673 to pass command and control information between Port A and Port B without putting it ...
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IDT72V3653/72V3663/72V3673 3.3V CMOS SyncFIFO BUS-MATCHING 2,048 x 36, 4,096 x 36, and 8,192 x 36 BYTE ORDER ON PORT A: BYTE ORDER ON PORT SIZE SIZE SIZE ...
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IDT72V3653/72V3663/72V3673 3.3V CMOS SyncFIFO BUS-MATCHING 2,048 x 36, 4,096 x 36, and 8,192 x 36 CLKA CLKB t RSTS RS1, RS2 BE/FWFT FS2, FS1,FS0 FF/IR EF/OR t RSF AE t RSF AF t RSF MBF1, MBF2 RTM LOW NOTES: 1. ...
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IDT72V3653/72V3663/72V3673 3.3V CMOS SyncFIFO BUS-MATCHING 2,048 x 36, 4,096 x 36, and 8,192 x 36 CLKA 1 4 RS1 t FSS t FSH FS2 t FSS t FSH 0,0 FS1,FS0 FF/IR ENA A0-A35 NOTE: 1. CSA = LOW, W/RA = ...
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IDT72V3653/72V3663/72V3673 3.3V CMOS SyncFIFO BUS-MATCHING 2,048 x 36, 4,096 x 36, and 8,192 CLK t t CLKL CLKH CLKA FF/IRA HIGH t ENS1 CSA t ENS1 W/RA t ENS2 MBA t ENS2 ENA t DS A0-A35 NOTE: ...
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IDT72V3653/72V3663/72V3673 3.3V CMOS SyncFIFO BUS-MATCHING 2,048 x 36, 4,096 x 36, and 8,192 x 36 CLKB FF/OR HIGH CSB W/RB MBB ENB B0-B17 (Standard Mode) OR B0-B17 (FWFT Mode) NOTE: 1. Unused word B18-B35 are indeterminate. DATA SIZE TABLE FOR ...
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IDT72V3653/72V3663/72V3673 3.3V CMOS SyncFIFO BUS-MATCHING 2,048 x 36, 4,096 x 36, and 8,192 x 36 CLKB EF/OR HIGH CSB W/RB MBB t ENS2 ENB t MDV t EN B0-B8 (Standard Mode MDV t B0-B8 EN (FWFT Mode) NOTE: ...
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IDT72V3653/72V3663/72V3673 3.3V CMOS SyncFIFO BUS-MATCHING 2,048 x 36, 4,096 x 36, and 8,192 x 36 CLKA LOW CSA W/RA HIGH t t ENS2 ENH MBA t t ENS2 ENH ENA IR HIGH A0-A35 W1 t SKEW1 ...
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IDT72V3653/72V3663/72V3673 3.3V CMOS SyncFIFO BUS-MATCHING 2,048 x 36, 4,096 x 36, and 8,192 x 36 CLKA CSA LOW W/RA HIGH t t ENS2 MBA t t ENS2 ENH ENA FF HIGH A0-A35 W1 t SKEW1 CLKB EF ...
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IDT72V3653/72V3663/72V3673 3.3V CMOS SyncFIFO BUS-MATCHING 2,048 x 36, 4,096 x 36, and 8,192 CLK t t CLKH CLKL CLKB CSB LOW W/RB HIGH LOW MBB t ENS2 ENB OR HIGH B0-B35 Previous Word in FIFO Output Register ...
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IDT72V3653/72V3663/72V3673 3.3V CMOS SyncFIFO BUS-MATCHING 2,048 x 36, 4,096 x 36, and 8,192 CLK t t CLKH CLKL CLKB CSB LOW W/RB HIGH LOW MBB t ENS2 ENB EF HIGH B0-B35 Previous Word in FIFO Output Register ...
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IDT72V3653/72V3663/72V3673 3.3V CMOS SyncFIFO BUS-MATCHING 2,048 x 36, 4,096 x 36, and 8,192 x 36 CLKA t t ENS2 ENA t AF [D-(Y+1)] Words in FIFO CLKB ENB NOTES: is the minimum time between a rising CLKA edge and a ...
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IDT72V3653/72V3663/72V3673 3.3V CMOS SyncFIFO BUS-MATCHING 2,048 x 36, 4,096 x 36, and 8,192 x 36 CLKB CSB W/RB MBB ENB B0-B35 CLKA MBF2 CSA W/RA MBA ENA t EN FIFO Output Register A0-A35 NOTE Port B is configured ...
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IDT72V3653/72V3663/72V3673 3.3V CMOS SyncFIFO BUS-MATCHING 2,048 x 36, 4,096 x 36, and 8,192 x 36 CLKA 1 2 CLKB 2 1 ENB t RSTS RT t RTMS RTM EF B0-Bn NOTE: 1. CSB = LOW; W/RB is HIGH 2. Retransmit ...
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IDT72V3653/72V3663/72V3673 3.3V CMOS SyncFIFO BUS-MATCHING 2,048 x 36, 4,096 x 36, and 8,192 x 36 WRITE WRITE CLOCK (CLKA) CHIP SELECT (CSA WRITE SELECT (W/RA) WRITE ENABLE (ENA) ALMOST-FULL FLAG (AF) 72V3653 72V3663 ...
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IDT72V3653/72V3663/72V3673 3.3V CMOS SyncFIFO BUS-MATCHING 2,048 x 36, 4,096 x 36, and 8,192 x 36 Timing Input t S Data, 1.5 V Enable Input VOLTAGE WAVEFORMS SETUP AND HOLD TIMES Output Enable 1 PLZ Low-Level Output High-Level Output ...
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ORDERING INFORMATION XXXXXX Device Type Power Speed Package NOTES: 1. Industrial temperature range is available by special order. 2. Green parts available. For specific speeds and packages contact your sales office. DATASHEET DOCUMENT HISTORY 06/23/2000 pgs. 1-5, ...