LM3S5632 Luminary Micro, Inc, LM3S5632 Datasheet - Page 159
LM3S5632
Manufacturer Part Number
LM3S5632
Description
Lm3s5632 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S5632.pdf
(685 pages)
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Reset
Reset
Type
Type
Flash Controller Raw Interrupt Status (FCRIS)
Base 0x400F.D000
Offset 0x00C
Type RO, reset 0x0000.0000
June 02, 2008
Bit/Field
31:2
RO
RO
1
0
31
15
0
0
RO
RO
Register 5: Flash Controller Raw Interrupt Status (FCRIS), offset 0x00C
This register indicates that the flash controller has an interrupt condition. An interrupt is only signaled
if the corresponding FCIM register bit is set.
30
14
0
0
RO
RO
29
13
reserved
0
0
Name
PRIS
ARIS
RO
RO
28
12
0
0
RO
RO
27
11
0
0
Type
RO
RO
RO
RO
RO
26
10
0
0
RO
RO
Reset
25
0
9
0
0x0
reserved
0
0
Preliminary
RO
RO
24
0
8
0
reserved
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Programming Raw Interrupt Status
This bit indicates the current state of the programming cycle. If set, the
programming cycle completed; if cleared, the programming cycle has
not completed. Programming cycles are either write or erase actions
generated through the Flash Memory Control (FMC) register bits (see
page 157).
Access Raw Interrupt Status
This bit indicates if the flash was improperly accessed. If set, the program
tried to access the flash counter to the policy as set in the Flash Memory
Protection Read Enable (FMPREn) and Flash Memory Protection
Program Enable (FMPPEn) registers. Otherwise, no access has tried
to improperly access the flash.
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
RO
RO
19
0
3
0
LM3S5632 Microcontroller
RO
RO
18
0
2
0
PRIS
RO
RO
17
0
1
0
ARIS
RO
RO
16
0
0
0
159
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