LM3S5632 Luminary Micro, Inc, LM3S5632 Datasheet - Page 588

• Manufacturer Part Number: LM3S5632
• Description: Lm3s5632 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Univeral Serial Bus (USB) Controller
588
Bit/Field
1:0
5
4
3
2
DMAMOD
reserved
DMAEN
MODE
Name
FDT
Type
R/W
R/W
R/W
R/W
RO
Reset
0x00
0
0
0
0
Preliminary
Description
Mode
The CPU sets this bit to enable the endpoint direction as TX, and clears
the bit to enable it as RX.
Note:
DMA Request Enable
The CPU sets this bit to enable the DMA request for the transmit
endpoint.
Force Data Toggle
The CPU sets this bit to force the endpoint data toggle to switch and
the data packet to be cleared from the FIFO, regardless of whether an
ACK was received. This can be used by interrupt transmit endpoints
that are used to communicate rate feedback for isochronous endpoints.
DMA Request Mode
The CPU sets this bit to select DMA Request Mode 1 and clears it to
select DMA Request Mode 0.
Note:
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
This bit only has an effect where the same endpoint FIFO is
used for both transmit and receive transactions.
This bit must not be cleared either before or in the same cycle
as the above DMAEN bit is cleared.
June 02, 2008