LM3S5632 Luminary Micro, Inc, LM3S5632 Datasheet - Page 608

• Manufacturer Part Number: LM3S5632
• Description: Lm3s5632 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Reset
Reset
Type
Type
Univeral Serial Bus (USB) Controller
USB External Power Control (USBEPC)
Base 0x4005.0000
Offset 0x400
Type R/W, reset 0x0000.0000
608
Host
Bit/Field
31:10
9:8
RO
RO
7
31
15
0
0
RO
RO
Register 88: USB External Power Control (USBEPC), offset 0x400
USBEPC is instantiated in a USB unit in a wrapper around the USB controller/PHY IP. This 32-bit
register specifies the function of the two-pin external power interface (USB0EPEN and USB0PFLT).
The assertion of the power fault input may generate an automatic action, as controlled by the
hardware configuration registers. The automatic action is necessary since the fault condition may
require a response faster than one provided by firmware.
30
14
0
0
RO
RO
PFLTACT
29
13
reserved
reserved
0
0
Name
reserved
RO
RO
28
12
0
0
RO
RO
27
11
0
0
Type
R/W
RO
RO
RO
RO
26
10
0
0
R/W
RO
Reset
25
0x00
0x00
0
9
0
PFLTACT
0
Preliminary
R/W
RO
24
0
8
0
reserved
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Power Fault Action
Specifies how the USB0EPEN signal is changed when detecting a USB
power fault.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Value
0x0
0x1
0x2
0x3
reserved
RO
RO
23
0
7
0
Description
Unchanged
USB0EPEN is controlled by the combination of the EPEN and
EPENDE bits.
Tristate
USB0EPEN is undriven (tristate).
Low
USB0EPEN driven Low.
High
USB0EPEN driven High.
PFLTAEN
R/W
RO
22
0
6
0
PFLTSEN
R/W
RO
21
0
5
0
PFLTEN
R/W
RO
20
0
4
0
reserved
RO
RO
19
0
3
0
EPENDE
R/W
RO
18
0
2
0
R/W
RO
17
0
1
0
June 02, 2008
EPEN
R/W
RO
16
0
0
0