LM3S310 Luminary Micro, Inc, LM3S310 Datasheet - Page 287

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LM3S310

Manufacturer Part Number
LM3S310
Description
Lm3s310 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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July 5, 2006
Reset
Reset
Type
Type
Bit Field
PWM Time Base Sync (PWMSYNC)
Offset 0x004
RO
RO
31
15
0
0
31:3
2
1
0
Register 2: PWM Time Base Sync (PWMSYNC), offset 0x004
This register provides a method to perform synchronization of the counters in the PWM generation
blocks. Writing a bit in this register to 1 causes the specified counter to reset back to 0; writing
multiple bits resets multiple counters simultaneously. The bits auto-clear after the reset has
occurred; reading them back as zero indicates that the synchronization has completed.
RO
RO
30
14
0
0
reserved
Sync2
Sync1
Sync0
Name
RO
RO
29
13
0
0
RO
RO
28
12
0
0
Type
R/W
R/W
R/W
RO
RO
RO
27
11
0
0
RO
RO
26
10
0
0
reserved
Reset
RO
RO
25
0
9
0
0
0
0
0
Preliminary
RO
RO
24
0
8
0
reserved
Description
Reserved bits return an indeterminate value, and should
never be changed.
Performs a reset of the PWM generator 2 counter.
Performs a reset of the PWM generator 1 counter.
Performs a reset of the PWM generator 0 counter.
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
RO
RO
19
0
3
0
LM3S310 Data Sheet
Sync2
R/W
RO
18
0
2
0
Sync1
R/W
RO
17
0
1
0
Sync0
R/W
RO
16
0
0
0
287

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