MT29F1G08ABBHC-ET Micron, MT29F1G08ABBHC-ET Datasheet - Page 34
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MT29F1G08ABBHC-ET
Manufacturer Part Number
MT29F1G08ABBHC-ET
Description
NAND Flash Memory; Density: 1Gb; Organization: 128Mbx8; Bits/Cell: SLC; I/O: Common; Supply Voltage: 1.8V; Operating Temperature Range: -40° to +85°C; Package: 63-VFBGA
Manufacturer
Micron
Datasheet
1.MT29F1G08ABBHC-ET.pdf
(70 pages)
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Figure 22:
Figure 23:
BLOCK ERASE 60h-D0h
Figure 24:
PDF: 09005aef81dc05df / Source: 09005aef821d5f08
1gb_nand_m48a__2.fm - Rev. E 1/08 EN
R/B#
R/B#
I/Ox
I/Ox
00h
00h
INTERNAL DATA MOVE
INTERNAL DATA MOVE with RANDOM DATA INPUT
BLOCK ERASE Operation
Address
Address
Erasing occurs at the block level. The MT29F1G08 and the MT29F1G16 have 1,024 erase
blocks organized as 64 pages per block. The BLOCK ERASE command operates on one
block at a time (see Figure 24).
Two cycles of addresses BA[15:6] are required for the x8 device, and 2 cycles of BA[15:6]
for the x16 device. Although addresses PA[5:0] (x8) and PA[5:0] (x16) are loaded, they are a
“Don’t Care” and are ignored for BLOCK ERASE operations. See Figures 6 and 7 on pages 14
and 15 for addressing details.
The actual BLOCK ERASE command sequence is a two-step process. First, write the
ERASE SETUP (60h) command to the command register. Then write 2 cycles of
addresses to the device. Next, write the ERASE CONFIRM (D0h) command to the com-
mand register. At the rising edge of WE#, R/B# goes LOW and the internal control logic
automatically controls the timing and erase-verify operations. R/B# stays LOW for the
entire
The READ STATUS REGISTER command can be used to check the status of the ERASE
operation. When bit 6 = 1, the ERASE operation is complete. Bit 0 indicates a pass/fail
condition where 0 = pass. See BLOCK ERASE, and Table 9 on page 29 for details.
R/B#
I/Ox
35h
35h
t
BERS erase time.
60h
t R
t R
85h
Address
85h
Address
Address
34
D0h
Data
10h
Unlimited number of repetitions
Micron Technology, Inc., reserves the right to change products or specifications without notice.
85h
t BERS
1Gb: x8, x16 NAND Flash Memory
t PROG
(2 cycles)
Address
70h
70h
Data
Command Definitions
©2006 Micron Technology, Inc. All rights reserved.
10h
Status
t PROG
Status
70h