MT90868 Zarlink Semiconductor, Inc., MT90868 Datasheet - Page 25
![no-image](/images/no-image-200.jpg)
MT90868
Manufacturer Part Number
MT90868
Description
High Bandwidth Digital Switch - 8,192 x 8,192 channels among local streams and 1,024 x 1,024 channels among two selected backplane streams
Manufacturer
Zarlink Semiconductor, Inc.
Datasheet
1.MT90868.pdf
(59 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MT90868AG
Manufacturer:
ZARLINK
Quantity:
14
Company:
Part Number:
MT90868AG2
Manufacturer:
ZARLINK
Quantity:
14
Advance Information
actual channel outputs. Figure 16 describes the
Local External Tristate Control Timing.
The ODE and RESET pins also control the LCSTo
pins. See Table 5, the OSB bit description in the
control register.
Bit Error Rate Test
The MT90868 offers users the Bit Error Rate (BER)
test feature for the backplane and local interfaces.
The circuitry of the BER test consists of a transmitter
and a receiver on both interfaces which can transmit
and receive the BER patterns independently. The
transmitter can output pseudo random patterns of
the form 2
frame and last a minimum of one channel and a
maximum of one frame time (125 s). The BER test
mode is activated by setting the LTM1 - LTM0 bits to
"11" or the BTM1 - BTM0 bits to "11" in the local and
the backplane connection memory respectively and
also setting the SBERL bit (for local) or the SBERB
LCSTo0
LCSTo1
LCSTo2
LCSTo3
LSTo63
FP8o
LSTo0
C8o
15
- 1 which can start anywhere in the
Ch127
Ch127
1
1
0
0
7
7
Ch 0
Ch 0
6
6
Figure 16 - Local External Tristate Control Timing
5
5
4
4
3
3
Ch 126
Ch 126
2
2
1
1
bit (for backplane) in the Control Register (CR) to
high.
For the test, the users can program the BER pattern
for multiple consecutive output channels through the
connection memory. However, the number of
consecutive output channels must be the same as
the number of input channels defined in the local and
backplane BER length registers (LBLR and BBLR)
which define how many BER channels to be
monitored by the BER receivers.
There are three types of registers to control the BER
transmitter and receiver circuits. The BER Start
Receive Registers for the local (LBSRR) and the
backplane (BBSRR) define the input stream and
channel from where the BER sequence will start to
compare. The BER Length Registers for the local
(LBLR) and the backplane (BBLR) define the number
of input channels which the sequence will be last.
The BER Count Registers for the local (LBCR) and
the backplane (BBCR) contain the number of
counted BER errors after the comparison. To prevent
0
0
7
7
6
6
Nine C8o cycles
5
5
Ch127
4
4
Ch127
3
3
2
2
1
1
0
0
MT90868
7
7
25