TS68302MAB Atmel Corporation, TS68302MAB Datasheet - Page 32

• Manufacturer Part Number: TS68302MAB
• Description: 16-bit Communication Controller, 16-20 MHz
• Manufacturer: Atmel Corporation

Table 22. AC Electrical Specifications - NMSI Timing
The NMSI mode uses two clocks, one for receive and one for transmit. Both clocks can be internal or external. When the
clock is internal, it is generated by the internal baud rate generator and it is output on L1R x D or L1T x D. All the timing is
related to the external clock pin. The timing is specified for NMSI1. It is also valid for NMS12 and NMS13.
Notes:
Figure 25. PCM Timing Diagram
32
(OUTPUT)
(OUTPUT)
Num.
(INTPUT)
315
316
317
318
319
320
321
322
323
(INPUT)
(INPUT)
(INPUT)
L1RXD
L1TXD
L1TXD
L1CLK
L1SY0
L1SY1
L1SY0
L1SY1
1. The ratio CLK/TCLK1 and CLK/RCLK1 must be greater than 2.5/1 for external clock. For internal clock the ratio must be
2. Schmitt triggers used on input buffers.
3. Also applies to CD hold time when CD is used as an external sync in BISYNC or totally transparent mode.
4. See Figure 26.
TS68302
greater than 3/1 (the input clock to the baud rate generator may be either CLK or TIM1), in both cases the maximum fre-
quency is limited to 16.67 MHz. In asynchronous mode (UART), the bit rate is 1/16 of the clock rate.
Parameter
RCLK1 and TCLK1 frequency
RCLK1 and TCLK1 low/high
RCLK1 and TCLK1 rise/fall time
T x D1 active delay TCLK1 falling edge
RTS1 active/inactive delay from TCLK1 falling edge
CTS1 setup time to TCLK1 rising edge
R x D1 setup time to RCLK1 rising edge
R x D1 hold time from RCLK1 rising edge
CD1 setup time to RCLK1 rising edge
302
306
302
310
308
1
1
1
1
2
300
309
2
2
2
(1)
(2)
3
301
SYNC ENVELOPES DATAS
3
3
3
(3)
4
305
4
4
4
(4)
5
5
5
5
6
304
Min
6
6
6
70
50
50
10
50
Internal Clock
—
0
0
7
7
7
7
Max
5.12
40
40
—
8
307
8
8
8
303
9
Min
External Clock
10
50
10
55
—
10
0
0
9
9
10
311
307
6.668
Max
100
70
—
11
2117A–HIREL–11/02
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns