TS68302MAB Atmel Corporation, TS68302MAB Datasheet - Page 41

• Manufacturer Part Number: TS68302MAB
• Description: 16-bit Communication Controller, 16-20 MHz
• Manufacturer: Atmel Corporation

Serial Communication Port
Serial Management
Controllers
Serial Channels Physical
Interface
2117A–HIREL–11/02
•
•
•
The SCP is a full-duplex, synchronous, character-oriented channel which provides a
three-wire interface (TXD, RXD, and clock). The SCP consists of independent transmit-
ter and receiver sections and a common SCP clock generator. The transmitter and
receiver section use the same clock, which is derived from the main clock by an on-chip
baud rate generator. The TS68302 is an SCP master, generating both the enable and
the clock signals. The enable signals may be generated by the general-purpose I/O
pins.
The SCP allows the TS68302 to communicate with a variety of serial devices for the
exchange of status and control information using a subset of the Motorola serial periph-
eral interface (SPI). Such devices may include industry-standard CODECs and other
microcontrollers and peripherals.
The SCP can be configured to operate in a local loopback mode, which is useful for
diagnostic functions. The receiver and the transmitter operate normally in these modes.
The SCP features are as follows:
•
•
•
•
•
The SMCs are two synchronous, full-duplex ports that may be configured to operate in
either IDL or GCI mode to handle the maintenance and control portions of these inter-
faces. The SMC ports are not used in PCM or NMSI modes.
The SMC features are as follows:
•
•
•
•
The serial channels physical interface connects the physical layer serial lines and the
serial controllers (three SCCs and two SMCs). The interface implements both the rout-
ing and the time-division multiplexing for the full ISDN bandwidth. It supports four buses:
IDL, GCI, PCM, and NMSI (a nonmultiplexed modem interface). The multiplexed modes
(IDL, GCI, and PCM) also allow multiple channels (e.g., ISDN B channels) or user-
defined subchannels to be assigned to a given SCC. The serial interface also supports
two testing modes: echo and loopback.
For the IDL and GSI buses, support of management functions in the frame structure is
provided by the SCP or SMCs, respectively. Refer to Figure 29 for the serial channels
physical interface block diagram.
maintenance of four 16-bit error counters,
provides asynchronous link over which DDCMP may be used,
Flow control character transmission supported.
three-wire interface (SPTXD, SPRXD, and SPCLK),
full-duplex operation,
clock rate up to 4.096 MHz,
programmable baud rate generator,
local loopback capability for testing purposes.
two modes of operation - IDL and GCI,
local loopback capability for testing purposes,
full-duplex operation,
SMC1 in GCI mode detects collisions on the D channel.
TS68302
41