upd44645182af5-fq1-a Renesas Electronics Corporation., upd44645182af5-fq1-a Datasheet - Page 27

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upd44645182af5-fq1-a

Manufacturer Part Number
upd44645182af5-fq1-a
Description
72m-bit Qdrtm Ii Sram 2-word Burst Operation
Manufacturer
Renesas Electronics Corporation.
Datasheet
Output Pin States of CQ, CQ# and Q
Remark
EXTEST
IDCODE
SAMPLE-Z
SAMPLE
BYPASS
Instructions
The output pin statuses during each instruction vary according
to the Control-Register status (value of Boundary Scan
Register, bit no. 109).
There are three statuses:
The Control-Register status is set during Update-DR at the
EXTEST or SAMPLE instruction.
Update : Contents of the “Update Register” are output to
SRAM : Contents of the SRAM internal output “SRAM
High-Z : The output pin (QDR Pad) becomes high
the output pin (QDR Pad).
Output” are output to the output pin (QDR Pad).
impedance by controlling of the “High-Z JTAG
ctrl”.
Control-Register Status
0
1
0
1
0
1
0
1
0
1
Preliminary Data Sheet M19958EJ1V0DS
μ
PD44645092A-A, 44645182A-A, 44645362A-A
CQ,CQ#
Update
Update
High-Z
High-Z
SRAM
SRAM
SRAM
SRAM
SRAM
SRAM
Output Pin Status
Update
High-Z
High-Z
High-Z
SRAM
SRAM
SRAM
SRAM
SRAM
SRAM
Q
QDR
Pad
Boundary Scan
Register
High-Z
Update
CAPTURE
Register
Register
Update
JTAG ctrl
High-Z
Output
SRAM
Driver
SRAM
SRAM
Output
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