upd78f0124hgba1-8et-a Renesas Electronics Corporation., upd78f0124hgba1-8et-a Datasheet - Page 121

• Manufacturer Part Number: upd78f0124hgba1-8et-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

5.8.5 Register settings
Notes 1.
High-speed
system clock
Internal oscillation
clock
Subsystem
clock
The table below shows the statuses of the setting flags and status flags when each mode is set.
Note 4
f
2.
3.
4.
5.
6.
CPU
Valid only when “can be stopped by software” is selected for internal oscillator by the option byte.
Do not set MCC = 1 or MSTOP = 1 during high-speed system clock operation (even if MCC = 1 or
MSTOP = 1 is set, the high-speed system clock oscillation does not stop).
Do not set MCC = 1 during internal oscillation clock operation (even if MCC = 1 is set, the high-speed
system clock oscillation does not stop). To stop high-speed system clock oscillation during internal
oscillation clock operation, use MSTOP.
Shifting to subsystem clock operation mode must be performed from the high-speed system clock
operation mode. From subsystem clock operation mode, only high-speed system clock operation mode
can be shifted to.
Do not set MCM0 = 0 (shifting to internal oscillation clock operation) during subsystem clock operation.
Do not set MSTOP = 1 during subsystem clock operation (even if MSTOP = 1 is set, high-speed system
clock oscillation does not stop). To stop high-speed system clock oscillation during subsystem clock
operation, use MCC.
Note 2
Internal oscillator
oscillating
Internal oscillator stopped
High-speed system clock
oscillating
High-speed system clock
stopped
High-speed system clock
oscillating, internal
oscillator oscillating
High-speed system clock
stopped, internal oscillator
oscillating
High-speed system clock
oscillating, internal
oscillator stopped
High-speed system clock
stopped, internal oscillator
stopped
Mode
Table 5-7. Clock and Register Setting
CHAPTER 5 CLOCK GENERATOR
User’s Manual U16962EJ3V0UD
MCC
0
Note 3
PCC Register
0
0
0
0
1
0
1
CSS
0
0
0
0
1
1
1
1
Setting Flag
Register
MCM0
MCM
1
1
1
1
Note 5
Note 5
Note 5
Note 5
1
1
0
0
Register
MSTOP
MOC
0
0
0
0
Note 6
Note 6
Note 6
Note 6
0
0
0
1
RSTOP
Register
RCM
0
1
0
0
0
0
1
1
Note 1
Register
PCC
CLS
0
0
0
0
1
1
1
1
Status Flag
Register
MCM
MCS
1
1
0
0
1
1
1
1
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